Fast Frame Synchronization Design and FPGA Implementation in SF-BOTDA

Fast Frame Synchronization Design and FPGA Implementation in SF-BOTDA

To address the issues of high time consumption of frame synchronization involved in a scanning-free Brillouin optical time-domain analysis (SF-BOTDA) system, a fast frame synchronization algorithm based on incremental updating was proposed. In comparison to the standard frame synchronization algorit...

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Bibliographic Details
Main Authors:	Qiuyi Pan, Xincheng Huang, Rui Min, Weiping Liu
Format:	Article
Language:	English
Published:	MDPI AG 2020-02-01
Series:	Photonics
Subjects:	brillouin optical time-domain analysis frame synchronization field programmable gate array incremental updating
Online Access:	https://www.mdpi.com/2304-6732/7/1/17

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