DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER

An efficient Fast Fourier Transform (FFT) algorithm is used in the Orthogonal Frequency Division Multiplexing (OFDM) applications in order to compute the discrete Fourier transform. Also, a Single Path Delay Feedback (SDF) which is pipeline FFT architecture is used for faster performance to achieve...

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Main Authors: Rambabu Nusullapalli, Vaishnavi N
Format: Article
Language:English
Published: XLESCIENCE 2018-12-01
Series:International Journal of Advances in Signal and Image Sciences
Subjects:
Online Access:https://xlescience.org/index.php/IJASIS/article/view/34
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author Rambabu Nusullapalli
Vaishnavi N
author_facet Rambabu Nusullapalli
Vaishnavi N
author_sort Rambabu Nusullapalli
collection DOAJ
description An efficient Fast Fourier Transform (FFT) algorithm is used in the Orthogonal Frequency Division Multiplexing (OFDM) applications in order to compute the discrete Fourier transform. Also, a Single Path Delay Feedback (SDF) which is pipeline FFT architecture is used for faster performance to achieve high throughput. In conventional method, the FFT design has high delay and power due to time taken by the multiplication part. To decrease the delay, Kogge Stone Parallel Prefix Adder (KSPPA) is used with booth multiplier. As SDF is a simpler approach to realize FFT in different length, 64-point Radix-4 SDF-FFT algorithm using KSPPA in the booth multiplier is discussed in this study. The system is implemented in Xilinx 12.4 ISE and simulated using MODELSIM 6.3c. Results show that the system reduces the delay and power.
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spelling doaj.art-089e1a1195a749968a86abd7b050297f2022-12-22T02:23:10ZengXLESCIENCEInternational Journal of Advances in Signal and Image Sciences2457-03702018-12-014281510.29284/ijasis.4.2.2018.8-1534DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDERRambabu NusullapalliVaishnavi NAn efficient Fast Fourier Transform (FFT) algorithm is used in the Orthogonal Frequency Division Multiplexing (OFDM) applications in order to compute the discrete Fourier transform. Also, a Single Path Delay Feedback (SDF) which is pipeline FFT architecture is used for faster performance to achieve high throughput. In conventional method, the FFT design has high delay and power due to time taken by the multiplication part. To decrease the delay, Kogge Stone Parallel Prefix Adder (KSPPA) is used with booth multiplier. As SDF is a simpler approach to realize FFT in different length, 64-point Radix-4 SDF-FFT algorithm using KSPPA in the booth multiplier is discussed in this study. The system is implemented in Xilinx 12.4 ISE and simulated using MODELSIM 6.3c. Results show that the system reduces the delay and power.https://xlescience.org/index.php/IJASIS/article/view/34fft, sdf, kogge stone parallel prefix adder, booth multiplier, xilinx
spellingShingle Rambabu Nusullapalli
Vaishnavi N
DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER
International Journal of Advances in Signal and Image Sciences
fft, sdf, kogge stone parallel prefix adder, booth multiplier, xilinx
title DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER
title_full DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER
title_fullStr DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER
title_full_unstemmed DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER
title_short DESIGN OF FFT ARCHITECTURE USING KOGGE STONE ADDER
title_sort design of fft architecture using kogge stone adder
topic fft, sdf, kogge stone parallel prefix adder, booth multiplier, xilinx
url https://xlescience.org/index.php/IJASIS/article/view/34
work_keys_str_mv AT rambabunusullapalli designoffftarchitectureusingkoggestoneadder
AT vaishnavin designoffftarchitectureusingkoggestoneadder