A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator
Ultra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy-efficient and portable. In the pursuit of smaller a...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2020-02-01
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| Series: | Micromachines |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2072-666X/11/2/223 |
| _version_ | 1818194299560394752 |
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| author | Yannan Zhang Ke Han and Jiawei Li |
| author_facet | Yannan Zhang Ke Han and Jiawei Li |
| author_sort | Yannan Zhang |
| collection | DOAJ |
| description | Ultra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy-efficient and portable. In the pursuit of smaller and faster devices, researchers and scientists have worked out a number of ways to further lower the leaking current of MOSFETs (Metal oxide semiconductor field effect transistor). Nanowire structure is now regarded as a promising candidate of future generation of logical devices due to its ultra-low off-state leaking current compares to FinFET. However, the potential of nanowire in terms of off-state current has not been fully discovered. In this article, a novel Core−Insulator Gate-All-Around (CIGAA) nanowire has been proposed, investigated, and simulated comprehensively and systematically based on 3D numerical simulation. Comparisons are carried out between GAA and CIGAA. The new CIGAA structure exhibits low off-state current compares to that of GAA, making it a suitable candidate of future low-power and energy-efficient devices. |
| first_indexed | 2024-12-12T01:00:05Z |
| format | Article |
| id | doaj.art-096076db5c134cba9415e02a9d505e52 |
| institution | Directory Open Access Journal |
| issn | 2072-666X |
| language | English |
| last_indexed | 2024-12-12T01:00:05Z |
| publishDate | 2020-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Micromachines |
| spelling | doaj.art-096076db5c134cba9415e02a9d505e522022-12-22T00:43:45ZengMDPI AGMicromachines2072-666X2020-02-0111222310.3390/mi11020223mi11020223A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–InsulatorYannan Zhang0Ke Han1and Jiawei Li2School of Electronic Engineering, Beijing University of Posts and Telecommunications, Haidian district, Beijing 100876, ChinaSchool of Electronic Engineering, Beijing University of Posts and Telecommunications, Haidian district, Beijing 100876, ChinaSchool of Electronic Engineering, Beijing University of Posts and Telecommunications, Haidian district, Beijing 100876, ChinaUltra-low power and high-performance logical devices have been the driving force for the continued scaling of complementary metal oxide semiconductor field effect transistors which greatly enable electronic devices such as smart phones to be energy-efficient and portable. In the pursuit of smaller and faster devices, researchers and scientists have worked out a number of ways to further lower the leaking current of MOSFETs (Metal oxide semiconductor field effect transistor). Nanowire structure is now regarded as a promising candidate of future generation of logical devices due to its ultra-low off-state leaking current compares to FinFET. However, the potential of nanowire in terms of off-state current has not been fully discovered. In this article, a novel Core−Insulator Gate-All-Around (CIGAA) nanowire has been proposed, investigated, and simulated comprehensively and systematically based on 3D numerical simulation. Comparisons are carried out between GAA and CIGAA. The new CIGAA structure exhibits low off-state current compares to that of GAA, making it a suitable candidate of future low-power and energy-efficient devices.https://www.mdpi.com/2072-666X/11/2/223cmoscore-insulatorgate-all-aroundfield effect transistorgaananowire |
| spellingShingle | Yannan Zhang Ke Han and Jiawei Li A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator Micromachines cmos core-insulator gate-all-around field effect transistor gaa nanowire |
| title | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
| title_full | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
| title_fullStr | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
| title_full_unstemmed | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
| title_short | A Simulation Study of a Gate-All-Around Nanowire Transistor with a Core–Insulator |
| title_sort | simulation study of a gate all around nanowire transistor with a core insulator |
| topic | cmos core-insulator gate-all-around field effect transistor gaa nanowire |
| url | https://www.mdpi.com/2072-666X/11/2/223 |
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