Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII)
In this paper two new first order filter topologies realizing low-pass/all-pass (LP/AP) and low-pass/high-pass (LP/HP) outputs using electronically controllable second generation voltage conveyors (CVCIIs) are presented. Unlike second generation voltage conveyors (VCII), in CVCII each performance pa...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2021-03-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/10/7/822 |
| _version_ | 1797539441070309376 |
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| author | Gianluca Barile Leila Safari Leonardo Pantoli Vincenzo Stornelli Giuseppe Ferri |
| author_facet | Gianluca Barile Leila Safari Leonardo Pantoli Vincenzo Stornelli Giuseppe Ferri |
| author_sort | Gianluca Barile |
| collection | DOAJ |
| description | In this paper two new first order filter topologies realizing low-pass/all-pass (LP/AP) and low-pass/high-pass (LP/HP) outputs using electronically controllable second generation voltage conveyors (CVCIIs) are presented. Unlike second generation voltage conveyors (VCII), in CVCII each performance parameter, including ports, parasitic impedances, current and/or voltage gains can be electronically varied. Here, in particular, the proposed filter topologies are based on two CVCIIs, one resistor and one capacitor. In the first topology <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>LP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula> and in the second topology <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>LP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>LP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula> outputs are achievable, respectively. However, the current and voltage outputs are not achievable simultaneously and a floating capacitor is used. A control current (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula>) is used to change the first CVCII Y port impedance, which sets the filter −3 dB frequency (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">f</mi><mn>0</mn></msub></mrow></semantics></math></inline-formula>) of all the outputs. Moreover, in the second topology, the gains of HP and AP outputs are electronically adjusted by means of a control voltage (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula>). Favorably, no restricting matching condition is necessary. PSpice simulations using 0.18 µm CMOS technology and supply voltages of ±0.9V show that by changing <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula> from 0.5 µA to 50 µA, <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">f</mi><mn>0</mn></msub></mrow></semantics></math></inline-formula> is varied from 89 kHz to 1 MHz. Similarly, for a <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula> variation from −0.9 V to 0.185 V, the gains of <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula> vary from 30 dB to 0 dB and those of <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula> vary from 100 dB to 20 dB. The total harmonic distortion (THD) is about 8%. The power consumption is from 0.385 mW to 1.057 mW. |
| first_indexed | 2024-03-10T12:46:06Z |
| format | Article |
| id | doaj.art-0c5c8d59234a4ebfb6d758c413276329 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T12:46:06Z |
| publishDate | 2021-03-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-0c5c8d59234a4ebfb6d758c4132763292023-11-21T13:27:48ZengMDPI AGElectronics2079-92922021-03-0110782210.3390/electronics10070822Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII)Gianluca Barile0Leila Safari1Leonardo Pantoli2Vincenzo Stornelli3Giuseppe Ferri4Department of Industrial and Information Engineering and Economics, University of L’Aquila, 67100 L’Aquila, ItalyDepartment of Industrial and Information Engineering and Economics, University of L’Aquila, 67100 L’Aquila, ItalyDepartment of Industrial and Information Engineering and Economics, University of L’Aquila, 67100 L’Aquila, ItalyDepartment of Industrial and Information Engineering and Economics, University of L’Aquila, 67100 L’Aquila, ItalyDepartment of Industrial and Information Engineering and Economics, University of L’Aquila, 67100 L’Aquila, ItalyIn this paper two new first order filter topologies realizing low-pass/all-pass (LP/AP) and low-pass/high-pass (LP/HP) outputs using electronically controllable second generation voltage conveyors (CVCIIs) are presented. Unlike second generation voltage conveyors (VCII), in CVCII each performance parameter, including ports, parasitic impedances, current and/or voltage gains can be electronically varied. Here, in particular, the proposed filter topologies are based on two CVCIIs, one resistor and one capacitor. In the first topology <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>LP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula> and in the second topology <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>LP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>LP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula>/<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula> outputs are achievable, respectively. However, the current and voltage outputs are not achievable simultaneously and a floating capacitor is used. A control current (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula>) is used to change the first CVCII Y port impedance, which sets the filter −3 dB frequency (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">f</mi><mn>0</mn></msub></mrow></semantics></math></inline-formula>) of all the outputs. Moreover, in the second topology, the gains of HP and AP outputs are electronically adjusted by means of a control voltage (<inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula>). Favorably, no restricting matching condition is necessary. PSpice simulations using 0.18 µm CMOS technology and supply voltages of ±0.9V show that by changing <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula> from 0.5 µA to 50 µA, <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">f</mi><mn>0</mn></msub></mrow></semantics></math></inline-formula> is varied from 89 kHz to 1 MHz. Similarly, for a <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>con</mi></mrow></msub></mrow></semantics></math></inline-formula> variation from −0.9 V to 0.185 V, the gains of <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">I</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula> vary from 30 dB to 0 dB and those of <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>AP</mi></mrow></msub></mrow></semantics></math></inline-formula> and <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><msub><mi mathvariant="normal">V</mi><mrow><mi>HP</mi></mrow></msub></mrow></semantics></math></inline-formula> vary from 100 dB to 20 dB. The total harmonic distortion (THD) is about 8%. The power consumption is from 0.385 mW to 1.057 mW.https://www.mdpi.com/2079-9292/10/7/822electronically tunablevoltage conveyorVCIIall-pass filterlow-pass filterhigh-pass filter |
| spellingShingle | Gianluca Barile Leila Safari Leonardo Pantoli Vincenzo Stornelli Giuseppe Ferri Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII) Electronics electronically tunable voltage conveyor VCII all-pass filter low-pass filter high-pass filter |
| title | Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII) |
| title_full | Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII) |
| title_fullStr | Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII) |
| title_full_unstemmed | Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII) |
| title_short | Electronically Tunable First Order AP/LP and LP/HP Filter Topologies Using Electronically Controllable Second Generation Voltage Conveyor (CVCII) |
| title_sort | electronically tunable first order ap lp and lp hp filter topologies using electronically controllable second generation voltage conveyor cvcii |
| topic | electronically tunable voltage conveyor VCII all-pass filter low-pass filter high-pass filter |
| url | https://www.mdpi.com/2079-9292/10/7/822 |
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