PWM techniques for an asymmetric multilevel binary inverter: an FPGA‐based implementation
Abstract This paper deals with the design and implementation of the conventional Level‐Shifted‐PWM (LS‐PWM) and the PWM‐hybrid modulation techniques in a Field‐Programmable Gate Array (FPGA) development card, applicable to binary asymmetric multilevel converters; particularly herein, the Binary‐Asym...
Main Authors: | José A. Juárez‐Abad, Jorge L. Barahona‐Avalos, Jesús Linares‐Flores |
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Format: | Article |
Language: | English |
Published: |
Wiley
2021-06-01
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Series: | IET Power Electronics |
Subjects: | |
Online Access: | https://doi.org/10.1049/pel2.12131 |
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