Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search
5G Cell Search (CS) is the first step for user equipment (UE) to initiate communication with the 5G node B (gNB) every time it is powered ON. In cellular networks, CS is accomplished via synchronization signals (SS) broadcasted by gNB. 5G 3rd generation partnership project (3GPP) specifications offe...
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MDPI AG
2023-10-01
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Series: | Chips |
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Online Access: | https://www.mdpi.com/2674-0729/2/4/14 |
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author | Khalid Lodhi Jayant Chhillar Sumit J. Darak Divisha Sharma |
author_facet | Khalid Lodhi Jayant Chhillar Sumit J. Darak Divisha Sharma |
author_sort | Khalid Lodhi |
collection | DOAJ |
description | 5G Cell Search (CS) is the first step for user equipment (UE) to initiate communication with the 5G node B (gNB) every time it is powered ON. In cellular networks, CS is accomplished via synchronization signals (SS) broadcasted by gNB. 5G 3rd generation partnership project (3GPP) specifications offer a detailed discussion on the SS generation at gNB, but a limited understanding of their blind search and detection is available. Unlike 4G, 5G SS may not be transmitted at the center of carrier frequency, and their frequency location is unknown to UE. In this work, we demonstrate the 5G CS by designing 3GPP compatible hardware realization of the physical layer (PHY) of the gNB transmitter and UE receiver. The proposed SS detection explores a novel down-sampling approach resulting in a 60% reduction in on-chip memory and 50% lower search time. Via detailed performance analysis, we analyze the functional correctness, computational complexity, and latency of the proposed approach for different word lengths, signal-to-noise ratio (SNR), and down-sampling factors. We demonstrate end-to-end 5G CS using GNU Radio-based RFNoC framework on the USRP-FPGA platform and achieve 66% faster SS search compared to software. The 3GPP compatibility and demonstration on hardware strengthen the commercial significance of the proposed work. |
first_indexed | 2024-03-08T20:53:22Z |
format | Article |
id | doaj.art-0e061081e96149c2b1ba9573369347c7 |
institution | Directory Open Access Journal |
issn | 2674-0729 |
language | English |
last_indexed | 2024-03-08T20:53:22Z |
publishDate | 2023-10-01 |
publisher | MDPI AG |
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series | Chips |
spelling | doaj.art-0e061081e96149c2b1ba9573369347c72023-12-22T14:00:34ZengMDPI AGChips2674-07292023-10-012422324210.3390/chips2040014Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell SearchKhalid Lodhi0Jayant Chhillar1Sumit J. Darak2Divisha Sharma3Electronics and Communications Department, Indraprastha Institute of Information Technology Delhi, Delhi 110020, IndiaElectronics and Communications Department, Indraprastha Institute of Information Technology Delhi, Delhi 110020, IndiaElectronics and Communications Department, Indraprastha Institute of Information Technology Delhi, Delhi 110020, IndiaElectronics and Communications Department, Indraprastha Institute of Information Technology Delhi, Delhi 110020, India5G Cell Search (CS) is the first step for user equipment (UE) to initiate communication with the 5G node B (gNB) every time it is powered ON. In cellular networks, CS is accomplished via synchronization signals (SS) broadcasted by gNB. 5G 3rd generation partnership project (3GPP) specifications offer a detailed discussion on the SS generation at gNB, but a limited understanding of their blind search and detection is available. Unlike 4G, 5G SS may not be transmitted at the center of carrier frequency, and their frequency location is unknown to UE. In this work, we demonstrate the 5G CS by designing 3GPP compatible hardware realization of the physical layer (PHY) of the gNB transmitter and UE receiver. The proposed SS detection explores a novel down-sampling approach resulting in a 60% reduction in on-chip memory and 50% lower search time. Via detailed performance analysis, we analyze the functional correctness, computational complexity, and latency of the proposed approach for different word lengths, signal-to-noise ratio (SNR), and down-sampling factors. We demonstrate end-to-end 5G CS using GNU Radio-based RFNoC framework on the USRP-FPGA platform and achieve 66% faster SS search compared to software. The 3GPP compatibility and demonstration on hardware strengthen the commercial significance of the proposed work.https://www.mdpi.com/2674-0729/2/4/143GPP5G cell search5G physical layerRFNoCFPGAsynchronization signal burst |
spellingShingle | Khalid Lodhi Jayant Chhillar Sumit J. Darak Divisha Sharma Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search Chips 3GPP 5G cell search 5G physical layer RFNoC FPGA synchronization signal burst |
title | Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search |
title_full | Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search |
title_fullStr | Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search |
title_full_unstemmed | Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search |
title_short | Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search |
title_sort | design and performance analysis of hardware realization of 3gpp physical layer for 5g cell search |
topic | 3GPP 5G cell search 5G physical layer RFNoC FPGA synchronization signal burst |
url | https://www.mdpi.com/2674-0729/2/4/14 |
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