Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems
This paper focuses on embedded system modeling, proposing a solution to obtain a refined net via the refinement operation of an extended Petri net. Object-oriented technology and Petri net with inhibitor-arcs-based representation for embedded systems (PIRES+) are combined to obtain an object-oriente...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2023-09-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/12/18/3977 |
| _version_ | 1797580363482005504 |
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| author | Chuanliang Xia Mengying Qin Yan Sun Maibo Guo |
| author_facet | Chuanliang Xia Mengying Qin Yan Sun Maibo Guo |
| author_sort | Chuanliang Xia |
| collection | DOAJ |
| description | This paper focuses on embedded system modeling, proposing a solution to obtain a refined net via the refinement operation of an extended Petri net. Object-oriented technology and Petri net with inhibitor-arcs-based representation for embedded systems (PIRES+) are combined to obtain an object-oriented PIRES+ (OOPIRES+). A gateway refinement method of OOPIRES+ is proposed, and the preservation of the liveness, boundedness, reachability, functionality, and timing of the refined net system is investigated. The modeling analysis of a smart home system is taken as an example to verify the effectiveness of the refinement method. The results can provide an effective way for the investigation of the refined properties of a Petri net system and a favorable means for large-scale complex embedded system modeling, which has broad application prospects. |
| first_indexed | 2024-03-10T22:49:51Z |
| format | Article |
| id | doaj.art-0fd67aecf391409f831349f0e3227f70 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T22:49:51Z |
| publishDate | 2023-09-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-0fd67aecf391409f831349f0e3227f702023-11-19T10:24:01ZengMDPI AGElectronics2079-92922023-09-011218397710.3390/electronics12183977Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded SystemsChuanliang Xia0Mengying Qin1Yan Sun2Maibo Guo3School of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaSchool of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaSchool of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaSchool of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, ChinaThis paper focuses on embedded system modeling, proposing a solution to obtain a refined net via the refinement operation of an extended Petri net. Object-oriented technology and Petri net with inhibitor-arcs-based representation for embedded systems (PIRES+) are combined to obtain an object-oriented PIRES+ (OOPIRES+). A gateway refinement method of OOPIRES+ is proposed, and the preservation of the liveness, boundedness, reachability, functionality, and timing of the refined net system is investigated. The modeling analysis of a smart home system is taken as an example to verify the effectiveness of the refinement method. The results can provide an effective way for the investigation of the refined properties of a Petri net system and a favorable means for large-scale complex embedded system modeling, which has broad application prospects.https://www.mdpi.com/2079-9292/12/18/3977extended Petri netsobject-oriented technologyrefinementproperty preservationembedded system modeling |
| spellingShingle | Chuanliang Xia Mengying Qin Yan Sun Maibo Guo Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems Electronics extended Petri nets object-oriented technology refinement property preservation embedded system modeling |
| title | Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems |
| title_full | Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems |
| title_fullStr | Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems |
| title_full_unstemmed | Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems |
| title_short | Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems |
| title_sort | property analysis of gateway refinement of object oriented petri net with inhibitor arcs based representation for embedded systems |
| topic | extended Petri nets object-oriented technology refinement property preservation embedded system modeling |
| url | https://www.mdpi.com/2079-9292/12/18/3977 |
| work_keys_str_mv | AT chuanliangxia propertyanalysisofgatewayrefinementofobjectorientedpetrinetwithinhibitorarcsbasedrepresentationforembeddedsystems AT mengyingqin propertyanalysisofgatewayrefinementofobjectorientedpetrinetwithinhibitorarcsbasedrepresentationforembeddedsystems AT yansun propertyanalysisofgatewayrefinementofobjectorientedpetrinetwithinhibitorarcsbasedrepresentationforembeddedsystems AT maiboguo propertyanalysisofgatewayrefinementofobjectorientedpetrinetwithinhibitorarcsbasedrepresentationforembeddedsystems |