Low-Noise Potentiostat Readout Circuit with a Chopper Fully Differential Difference Amplifier for Glucose Monitoring

This paper presents a low-noise potentiostat readout circuit with a chopper fully differential difference amplifier (FDDA) for glucose monitoring. Glucose monitoring is necessary for the early diagnosis of diabetes complications and for health management. Ammeter electrochemical sensors are widely u...

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Bibliographic Details
Main Authors: Gyuri Choi, Kyeongsik Nam, Mookyoung Yoo, Sanggyun Kang, Byeongkwan Jin, Kyounghwan Kim, Hyeoktae Son, Hyoungho Ko
Format: Article
Language:English
Published: MDPI AG 2022-11-01
Series:Applied Sciences
Subjects:
Online Access:https://www.mdpi.com/2076-3417/12/22/11334
Description
Summary:This paper presents a low-noise potentiostat readout circuit with a chopper fully differential difference amplifier (FDDA) for glucose monitoring. Glucose monitoring is necessary for the early diagnosis of diabetes complications and for health management. Ammeter electrochemical sensors are widely used for glucose detection, and in general, a three-electrode structure of a reference electrode (RE), a counter electrode (CE), and a working electrode (WE) is implemented with a potentiostat structure. A low-noise characteristic of the readout circuit is essential for highly accurate glucose monitoring. The chopping technique can reduce low-frequency noises such as 1/f noise and can achieve the required low-noise characteristic. The proposed potentiostat readout circuit is based on a low-noise chopper FDDA with a class-AB output stage. The implementation of the chopper FDDA scheme of the potentiostat readout circuit can decrease the number of amplifiers in the control part of the potentiostat, with reduced power consumption and a wide dynamic output range. The negative feedback loop of the inverting amplifier scheme with the FDDA maintains the voltage between the WE and RE constants. The negative feedback loop tracks the reference voltage of the RE with an input voltage of the WE. The proposed potentiostat readout circuit is designed in the standard 0.18 µm CMOS process, and the simulated current consumption is 48.54 μA with a 1.8 V power supply. The simulated input-referred noise level was 8.53 pArms.
ISSN:2076-3417