Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters
The application of multisampling technology in voltage-source inverters (VSIs) systems can significantly reduce the control delay and break the bandwidth limitations of traditional synchronous sampling schemes. However, when sampling the capacitor voltage, the high-frequency ripple is introduced int...
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IEEE
2024-01-01
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Online Access: | https://ieeexplore.ieee.org/document/10439193/ |
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author | Jian Yu Aohui Niu Zhiyuan Shi Le Zhou Renhui Shen |
author_facet | Jian Yu Aohui Niu Zhiyuan Shi Le Zhou Renhui Shen |
author_sort | Jian Yu |
collection | DOAJ |
description | The application of multisampling technology in voltage-source inverters (VSIs) systems can significantly reduce the control delay and break the bandwidth limitations of traditional synchronous sampling schemes. However, when sampling the capacitor voltage, the high-frequency ripple is introduced into the control loop, leading to the local vertical crossing (VC) phenomenon. Previous studies have demonstrated that a moving average filter (MAF) or improved repetitive filter (IRF) can effectively remove the high-frequency ripple. However, they introduce additional phase lag, which undermines the advantages of multisampling technology in terms of phase boost. The approach of spectrum analysis can be used to study the impact of voltage ripple. The results indicate that after modulation, the output signal contains low-frequency harmonics, and the superposition of the ripple makes the modulation process more susceptible to saturation. Therefore, a 20k ripple notch filter (RNF) is proposed to attenuate the ripple signal while introducing a more minor phase lag. Additionally, a 90° phase shift filter is proposed to suppress the aliasing signals generated in the system. Finally, the effectiveness of the proposed methods is verified through the experimental test of a 10kW single-phase VSI system. |
first_indexed | 2024-03-07T19:46:04Z |
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id | doaj.art-1176e65e9df249b39d1d0db8eae56adc |
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issn | 2169-3536 |
language | English |
last_indexed | 2024-03-07T19:46:04Z |
publishDate | 2024-01-01 |
publisher | IEEE |
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spelling | doaj.art-1176e65e9df249b39d1d0db8eae56adc2024-02-29T00:00:39ZengIEEEIEEE Access2169-35362024-01-0112285982861110.1109/ACCESS.2024.336728410439193Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled InvertersJian Yu0https://orcid.org/0000-0003-1359-121XAohui Niu1https://orcid.org/0009-0006-3760-2728Zhiyuan Shi2Le Zhou3https://orcid.org/0009-0007-8444-4061Renhui Shen4School of Automation and Software Engineering, Shanxi University, Taiyuan, ChinaSchool of Automation and Software Engineering, Shanxi University, Taiyuan, ChinaSchool of Automation and Software Engineering, Shanxi University, Taiyuan, ChinaSchool of Automation and Software Engineering, Shanxi University, Taiyuan, ChinaSchool of Automation and Software Engineering, Shanxi University, Taiyuan, ChinaThe application of multisampling technology in voltage-source inverters (VSIs) systems can significantly reduce the control delay and break the bandwidth limitations of traditional synchronous sampling schemes. However, when sampling the capacitor voltage, the high-frequency ripple is introduced into the control loop, leading to the local vertical crossing (VC) phenomenon. Previous studies have demonstrated that a moving average filter (MAF) or improved repetitive filter (IRF) can effectively remove the high-frequency ripple. However, they introduce additional phase lag, which undermines the advantages of multisampling technology in terms of phase boost. The approach of spectrum analysis can be used to study the impact of voltage ripple. The results indicate that after modulation, the output signal contains low-frequency harmonics, and the superposition of the ripple makes the modulation process more susceptible to saturation. Therefore, a 20k ripple notch filter (RNF) is proposed to attenuate the ripple signal while introducing a more minor phase lag. Additionally, a 90° phase shift filter is proposed to suppress the aliasing signals generated in the system. Finally, the effectiveness of the proposed methods is verified through the experimental test of a 10kW single-phase VSI system.https://ieeexplore.ieee.org/document/10439193/Aliasingcontrol delayvoltage source inverters (VSIs)multisamplinglow-order harmonics |
spellingShingle | Jian Yu Aohui Niu Zhiyuan Shi Le Zhou Renhui Shen Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters IEEE Access Aliasing control delay voltage source inverters (VSIs) multisampling low-order harmonics |
title | Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters |
title_full | Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters |
title_fullStr | Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters |
title_full_unstemmed | Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters |
title_short | Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters |
title_sort | ripple attenuation and aliasing suppression in multisampling digitally controlled inverters |
topic | Aliasing control delay voltage source inverters (VSIs) multisampling low-order harmonics |
url | https://ieeexplore.ieee.org/document/10439193/ |
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