Investigation of Static Performances of 1.2kV 4H-SiC MOSFETs Fabricated Using All ‘Room Temperature’ Ion Implantations

Investigation of Static Performances of 1.2kV 4H-SiC MOSFETs Fabricated Using All ‘Room Temperature’ Ion Implantations

Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25°C) and elevated temperature...

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Bibliographic Details
Main Authors: Stephen A. Mancini, Seung Yup Jang, Zeyu Chen, Dongyoung Kim, Alex Bialy, Balaji Raghotamacher, Michael Dudley, Nadeemullah Mahadik, Robert Stahlbush, Mowafak Al-Jassim, Woongje Sung
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
4H-Silicon Carbide (SiC)
MOSFET
3rd quadrant
design approach
leakage current
breakdown voltage
Online Access:https://ieeexplore.ieee.org/document/10416803/
Description
Summary:Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25°C) and elevated temperatures (600°C) in order to monitor subsequent lattice damage. Through the use of X-Ray topography, SEM imaging, and electrical measurements, it was shown that room temperature implanted devices can mimic the static performances of high temperature implanted MOSFETs and reduce lattice damage suffered during the fabrication process, when the dose of high energy implants are suppressed.
ISSN:2168-6734

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