Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller
In this study, we implemented a high-performance multichannel repeater, both for FM and T-Digital Multimedia Broadcasting (DMB) signals using a Field Programmable Gate Array (FPGA). In a system for providing services using wireless communication, a radio-shaded area is inevitably generated due to va...
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MDPI AG
2019-04-01
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Online Access: | https://www.mdpi.com/2079-9292/8/5/482 |
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author | Mangi Han Youngmin Kim |
author_facet | Mangi Han Youngmin Kim |
author_sort | Mangi Han |
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description | In this study, we implemented a high-performance multichannel repeater, both for FM and T-Digital Multimedia Broadcasting (DMB) signals using a Field Programmable Gate Array (FPGA). In a system for providing services using wireless communication, a radio-shaded area is inevitably generated due to various obstacles. Thus, an electronic device that receives weak or low-level signals and retransmits them at a higher level is crucial. In addition, parallel implementation of digital filters and gain controllers is necessary for a multichannel repeater. When power level is too low or too high, the repeater is required to compensate the power level and ensure a stable signal. However, analog- and software-based repeaters are expensive and they are difficult to install. They also cannot effectively process multichannel in parallel. The proposed system exploits various digital signal-processing algorithms, which include modulation, demodulation, Cascaded Integrator Comb (CIC) filters, Finite Impulse Response (FIR) filters, Interpolated Second Ordered Polynomials (ISOP) filters, and Automatic Gain Controllers (AGCs). The newly proposed AGC is more efficient than others in terms of computation amount and throughput. The designed digital circuit was implemented by using Verilog HDL, and tested using a Xilinx Kintex 7 device. As a result, the proposed repeater can simultaneously handle 40 FM channels and 6 DMB channels in parallel. Output power level is also always maintained by the AGC. |
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issn | 2079-9292 |
language | English |
last_indexed | 2024-04-11T10:59:17Z |
publishDate | 2019-04-01 |
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spelling | doaj.art-128c84c5a66e40a6b0abfc10feb3ef532022-12-22T04:28:39ZengMDPI AGElectronics2079-92922019-04-018548210.3390/electronics8050482electronics8050482Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain ControllerMangi Han0Youngmin Kim1School of Computer and Information Engineering, Kwangwoon University, Seoul 01897, KoreaSchool of Electronic and Electrical Engineering, Hongik University, Seoul 04066, KoreaIn this study, we implemented a high-performance multichannel repeater, both for FM and T-Digital Multimedia Broadcasting (DMB) signals using a Field Programmable Gate Array (FPGA). In a system for providing services using wireless communication, a radio-shaded area is inevitably generated due to various obstacles. Thus, an electronic device that receives weak or low-level signals and retransmits them at a higher level is crucial. In addition, parallel implementation of digital filters and gain controllers is necessary for a multichannel repeater. When power level is too low or too high, the repeater is required to compensate the power level and ensure a stable signal. However, analog- and software-based repeaters are expensive and they are difficult to install. They also cannot effectively process multichannel in parallel. The proposed system exploits various digital signal-processing algorithms, which include modulation, demodulation, Cascaded Integrator Comb (CIC) filters, Finite Impulse Response (FIR) filters, Interpolated Second Ordered Polynomials (ISOP) filters, and Automatic Gain Controllers (AGCs). The newly proposed AGC is more efficient than others in terms of computation amount and throughput. The designed digital circuit was implemented by using Verilog HDL, and tested using a Xilinx Kintex 7 device. As a result, the proposed repeater can simultaneously handle 40 FM channels and 6 DMB channels in parallel. Output power level is also always maintained by the AGC.https://www.mdpi.com/2079-9292/8/5/482FPGAmultichannel repeaterFM repeatersDMB repeatersmodulationfilterCascaded Integrator Comb filterFinite Impulse Response filterRealtime Automatic Gain Controller |
spellingShingle | Mangi Han Youngmin Kim Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller Electronics FPGA multichannel repeater FM repeaters DMB repeaters modulation filter Cascaded Integrator Comb filter Finite Impulse Response filter Realtime Automatic Gain Controller |
title | Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller |
title_full | Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller |
title_fullStr | Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller |
title_full_unstemmed | Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller |
title_short | Efficient Implementation of Multichannel FM and T-DMB Repeater in FPGA with Automatic Gain Controller |
title_sort | efficient implementation of multichannel fm and t dmb repeater in fpga with automatic gain controller |
topic | FPGA multichannel repeater FM repeaters DMB repeaters modulation filter Cascaded Integrator Comb filter Finite Impulse Response filter Realtime Automatic Gain Controller |
url | https://www.mdpi.com/2079-9292/8/5/482 |
work_keys_str_mv | AT mangihan efficientimplementationofmultichannelfmandtdmbrepeaterinfpgawithautomaticgaincontroller AT youngminkim efficientimplementationofmultichannelfmandtdmbrepeaterinfpgawithautomaticgaincontroller |