Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance
Abstract Machine learning (ML) provides temporal advantage and performance improvement in practical electronic device design by adaptive learning. Herein, Bayesian optimization (BO) is successfully applied to the design of optimal dual‐layer oxide semiconductor thin film transistors (OS TFTs). This...
| Main Authors: | , , , , , , , , |
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| Format: | Article |
| Language: | English |
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Wiley
2023-12-01
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| Series: | Advanced Science |
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| Online Access: | https://doi.org/10.1002/advs.202303589 |
| _version_ | 1797373723737587712 |
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| author | Jiho Lee Jae Hak Lee Chan Lee Haeyeon Lee Minho Jin Jiyeon Kim Jong Chan Shin Eungkyu Lee Youn Sang Kim |
| author_facet | Jiho Lee Jae Hak Lee Chan Lee Haeyeon Lee Minho Jin Jiyeon Kim Jong Chan Shin Eungkyu Lee Youn Sang Kim |
| author_sort | Jiho Lee |
| collection | DOAJ |
| description | Abstract Machine learning (ML) provides temporal advantage and performance improvement in practical electronic device design by adaptive learning. Herein, Bayesian optimization (BO) is successfully applied to the design of optimal dual‐layer oxide semiconductor thin film transistors (OS TFTs). This approach effectively manages the complex correlation and interdependency between two oxide semiconductor layers, resulting in the efficient design of experiment (DoE) and reducing the trial‐and‐error. Considering field effect mobility (𝜇) and threshold voltage (Vth) simultaneously, the dual‐layer structure designed by the BO model allows to produce OS TFTs with remarkable electrical performance while significantly saving an amount of experimental trial (only 15 data sets are required). The optimized dual‐layer OS TFTs achieve the enhanced field effect mobility of 36.1 cm2 V−1 s−1 and show good stability under bias stress with negligible difference in its threshold voltage compared to conventional IGZO TFTs. Moreover, the BO algorithm is successfully customized to the individual preferences by applying the weight factors assigned to both field effect mobility (𝜇) and threshold voltage (Vth). |
| first_indexed | 2024-03-08T18:54:33Z |
| format | Article |
| id | doaj.art-12c991abeed249a1a13f98a1c0ec3cae |
| institution | Directory Open Access Journal |
| issn | 2198-3844 |
| language | English |
| last_indexed | 2024-03-08T18:54:33Z |
| publishDate | 2023-12-01 |
| publisher | Wiley |
| record_format | Article |
| series | Advanced Science |
| spelling | doaj.art-12c991abeed249a1a13f98a1c0ec3cae2023-12-28T14:55:40ZengWileyAdvanced Science2198-38442023-12-011036n/an/a10.1002/advs.202303589Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical PerformanceJiho Lee0Jae Hak Lee1Chan Lee2Haeyeon Lee3Minho Jin4Jiyeon Kim5Jong Chan Shin6Eungkyu Lee7Youn Sang Kim8Department of Applied Bioengineering, Graduate School of Convergence Science and Technology Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaProgram in Nano Science and Technology Graduate School of Convergence Science and Technology Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaDepartment of Chemical and Biological Engineering College of Engineering Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaDepartment of Chemical and Biological Engineering College of Engineering Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaProgram in Nano Science and Technology Graduate School of Convergence Science and Technology Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaDepartment of Applied Bioengineering, Graduate School of Convergence Science and Technology Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaDepartment of Chemical and Biological Engineering College of Engineering Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaDepartment of Electronic Engineering Kyung Hee University Yongin‐si Gyeonggi‐do 17104 Republic of KoreaDepartment of Applied Bioengineering, Graduate School of Convergence Science and Technology Seoul National University Gwanak‐ro 1, Gwanak‐gu Seoul 08826 Republic of KoreaAbstract Machine learning (ML) provides temporal advantage and performance improvement in practical electronic device design by adaptive learning. Herein, Bayesian optimization (BO) is successfully applied to the design of optimal dual‐layer oxide semiconductor thin film transistors (OS TFTs). This approach effectively manages the complex correlation and interdependency between two oxide semiconductor layers, resulting in the efficient design of experiment (DoE) and reducing the trial‐and‐error. Considering field effect mobility (𝜇) and threshold voltage (Vth) simultaneously, the dual‐layer structure designed by the BO model allows to produce OS TFTs with remarkable electrical performance while significantly saving an amount of experimental trial (only 15 data sets are required). The optimized dual‐layer OS TFTs achieve the enhanced field effect mobility of 36.1 cm2 V−1 s−1 and show good stability under bias stress with negligible difference in its threshold voltage compared to conventional IGZO TFTs. Moreover, the BO algorithm is successfully customized to the individual preferences by applying the weight factors assigned to both field effect mobility (𝜇) and threshold voltage (Vth).https://doi.org/10.1002/advs.202303589Bayesian optimizationdesign of experimentdual‐layer channelmachine learningoxide semiconductorsthin film transistors |
| spellingShingle | Jiho Lee Jae Hak Lee Chan Lee Haeyeon Lee Minho Jin Jiyeon Kim Jong Chan Shin Eungkyu Lee Youn Sang Kim Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance Advanced Science Bayesian optimization design of experiment dual‐layer channel machine learning oxide semiconductors thin film transistors |
| title | Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance |
| title_full | Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance |
| title_fullStr | Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance |
| title_full_unstemmed | Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance |
| title_short | Machine Learning Driven Channel Thickness Optimization in Dual‐Layer Oxide Thin‐Film Transistors for Advanced Electrical Performance |
| title_sort | machine learning driven channel thickness optimization in dual layer oxide thin film transistors for advanced electrical performance |
| topic | Bayesian optimization design of experiment dual‐layer channel machine learning oxide semiconductors thin film transistors |
| url | https://doi.org/10.1002/advs.202303589 |
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