Best usage of free-space capacitors in ASIC regulators

In this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space...

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Main Authors: T. Maier, D. Droste, M. Siegel
Format: Article
Language:deu
Published: Copernicus Publications 2013-07-01
Series:Advances in Radio Science
Online Access:http://www.adv-radio-sci.net/11/125/2013/ars-11-125-2013.pdf
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author T. Maier
D. Droste
M. Siegel
author_facet T. Maier
D. Droste
M. Siegel
author_sort T. Maier
collection DOAJ
description In this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space capacitors (FSCs), as they can be connected to the input or the output net of a voltage regulator. Therefore we designed a testbench for mathematical calculations and one for simulations to identify the influence of a capacitance connected at these certain positions. We mainly focused on PSR analysis while not losing sight of transient effects. The results of calculation and simulation illustrate that the best solution is to split the capacitance half by half to both possible nets if no output capacitance was installed during design. Otherwise a ratio of one to one for input capacitance to output capacitance has to be set up for best performance.
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spelling doaj.art-12dec5f8583b4583843681470c75c4c02022-12-22T03:05:53ZdeuCopernicus PublicationsAdvances in Radio Science1684-99651684-99732013-07-011112513010.5194/ars-11-125-2013Best usage of free-space capacitors in ASIC regulatorsT. Maier0D. Droste1M. Siegel2Robert Bosch GmbH, Reutlingen, GermanyRobert Bosch GmbH, Reutlingen, GermanyKarlsruher Institut für Technologie (KIT), Karlsruhe, GermanyIn this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space capacitors (FSCs), as they can be connected to the input or the output net of a voltage regulator. Therefore we designed a testbench for mathematical calculations and one for simulations to identify the influence of a capacitance connected at these certain positions. We mainly focused on PSR analysis while not losing sight of transient effects. The results of calculation and simulation illustrate that the best solution is to split the capacitance half by half to both possible nets if no output capacitance was installed during design. Otherwise a ratio of one to one for input capacitance to output capacitance has to be set up for best performance.http://www.adv-radio-sci.net/11/125/2013/ars-11-125-2013.pdf
spellingShingle T. Maier
D. Droste
M. Siegel
Best usage of free-space capacitors in ASIC regulators
Advances in Radio Science
title Best usage of free-space capacitors in ASIC regulators
title_full Best usage of free-space capacitors in ASIC regulators
title_fullStr Best usage of free-space capacitors in ASIC regulators
title_full_unstemmed Best usage of free-space capacitors in ASIC regulators
title_short Best usage of free-space capacitors in ASIC regulators
title_sort best usage of free space capacitors in asic regulators
url http://www.adv-radio-sci.net/11/125/2013/ars-11-125-2013.pdf
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