Binary Addition in Resistance Switching Memory Array by Sensing Majority
The flow of data between processing and memory units in contemporary computing systems is their main performance and energy-efficiency bottleneck, often referred to as the ‘von Neumann bottleneck’ or ‘memory wall’. Emerging resistance switching memories (memristors) show promising signs to overcome...
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MDPI AG
2020-05-01
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| Series: | Micromachines |
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| Online Access: | https://www.mdpi.com/2072-666X/11/5/496 |
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| author | John Reuben |
| author_facet | John Reuben |
| author_sort | John Reuben |
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| description | The flow of data between processing and memory units in contemporary computing systems is their main performance and energy-efficiency bottleneck, often referred to as the ‘von Neumann bottleneck’ or ‘memory wall’. Emerging resistance switching memories (memristors) show promising signs to overcome the ‘memory wall’ by enabling computation in the memory array. Majority logic is a type of Boolean logic, and in many nanotechnologies, it has been found to be an efficient logic primitive. In this paper, a technique is proposed to implement a majority gate in a memory array. The majority gate is realised in an energy-efficient manner as a memory <inline-formula> <math display="inline"> <semantics> <mrow> <mi>R</mi> <mi>E</mi> <mi>A</mi> <mi>D</mi> </mrow> </semantics> </math> </inline-formula> operation. The proposed logic family disintegrates arithmetic operations to majority and NOT operations which are implemented as memory <inline-formula> <math display="inline"> <semantics> <mrow> <mi>R</mi> <mi>E</mi> <mi>A</mi> <mi>D</mi> </mrow> </semantics> </math> </inline-formula> and <inline-formula> <math display="inline"> <semantics> <mrow> <mi>W</mi> <mi>R</mi> <mi>I</mi> <mi>T</mi> <mi>E</mi> </mrow> </semantics> </math> </inline-formula> operations. A 1-bit full adder can be implemented in 6 steps (memory cycles) in a 1T–1R array, which is faster than <inline-formula> <math display="inline"> <semantics> <mrow> <mi>I</mi> <mi>M</mi> <mi>P</mi> <mi>L</mi> <mi>Y</mi> </mrow> </semantics> </math> </inline-formula>, <inline-formula> <math display="inline"> <semantics> <mrow> <mi>N</mi> <mi>A</mi> <mi>N</mi> <mi>D</mi> </mrow> </semantics> </math> </inline-formula>, <inline-formula> <math display="inline"> <semantics> <mrow> <mi>N</mi> <mi>O</mi> <mi>R</mi> </mrow> </semantics> </math> </inline-formula> and other similar logic primitives. |
| first_indexed | 2024-03-10T19:49:16Z |
| format | Article |
| id | doaj.art-1419cf065b1f4b0faf20a355f5ae4614 |
| institution | Directory Open Access Journal |
| issn | 2072-666X |
| language | English |
| last_indexed | 2024-03-10T19:49:16Z |
| publishDate | 2020-05-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Micromachines |
| spelling | doaj.art-1419cf065b1f4b0faf20a355f5ae46142023-11-20T00:30:59ZengMDPI AGMicromachines2072-666X2020-05-0111549610.3390/mi11050496Binary Addition in Resistance Switching Memory Array by Sensing MajorityJohn Reuben0Chair of Computer Science 3—Computer Architecture, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), 91058 Erlangen, GermanyThe flow of data between processing and memory units in contemporary computing systems is their main performance and energy-efficiency bottleneck, often referred to as the ‘von Neumann bottleneck’ or ‘memory wall’. Emerging resistance switching memories (memristors) show promising signs to overcome the ‘memory wall’ by enabling computation in the memory array. Majority logic is a type of Boolean logic, and in many nanotechnologies, it has been found to be an efficient logic primitive. In this paper, a technique is proposed to implement a majority gate in a memory array. The majority gate is realised in an energy-efficient manner as a memory <inline-formula> <math display="inline"> <semantics> <mrow> <mi>R</mi> <mi>E</mi> <mi>A</mi> <mi>D</mi> </mrow> </semantics> </math> </inline-formula> operation. The proposed logic family disintegrates arithmetic operations to majority and NOT operations which are implemented as memory <inline-formula> <math display="inline"> <semantics> <mrow> <mi>R</mi> <mi>E</mi> <mi>A</mi> <mi>D</mi> </mrow> </semantics> </math> </inline-formula> and <inline-formula> <math display="inline"> <semantics> <mrow> <mi>W</mi> <mi>R</mi> <mi>I</mi> <mi>T</mi> <mi>E</mi> </mrow> </semantics> </math> </inline-formula> operations. A 1-bit full adder can be implemented in 6 steps (memory cycles) in a 1T–1R array, which is faster than <inline-formula> <math display="inline"> <semantics> <mrow> <mi>I</mi> <mi>M</mi> <mi>P</mi> <mi>L</mi> <mi>Y</mi> </mrow> </semantics> </math> </inline-formula>, <inline-formula> <math display="inline"> <semantics> <mrow> <mi>N</mi> <mi>A</mi> <mi>N</mi> <mi>D</mi> </mrow> </semantics> </math> </inline-formula>, <inline-formula> <math display="inline"> <semantics> <mrow> <mi>N</mi> <mi>O</mi> <mi>R</mi> </mrow> </semantics> </math> </inline-formula> and other similar logic primitives.https://www.mdpi.com/2072-666X/11/5/496memristorresistance switching memorynon-volatile memory (NVM)in-memory computingmajority logicadder |
| spellingShingle | John Reuben Binary Addition in Resistance Switching Memory Array by Sensing Majority Micromachines memristor resistance switching memory non-volatile memory (NVM) in-memory computing majority logic adder |
| title | Binary Addition in Resistance Switching Memory Array by Sensing Majority |
| title_full | Binary Addition in Resistance Switching Memory Array by Sensing Majority |
| title_fullStr | Binary Addition in Resistance Switching Memory Array by Sensing Majority |
| title_full_unstemmed | Binary Addition in Resistance Switching Memory Array by Sensing Majority |
| title_short | Binary Addition in Resistance Switching Memory Array by Sensing Majority |
| title_sort | binary addition in resistance switching memory array by sensing majority |
| topic | memristor resistance switching memory non-volatile memory (NVM) in-memory computing majority logic adder |
| url | https://www.mdpi.com/2072-666X/11/5/496 |
| work_keys_str_mv | AT johnreuben binaryadditioninresistanceswitchingmemoryarraybysensingmajority |