MSI-A: An Energy Efficient Approximated Cache Coherence Protocol
Energy consumption has become an essential factor in designing modern computer system architecture. Because of physical limits, the termination of Moore’s law and Dennard’s scaling has forced the computer design community to investigate new approaches to meet the requirements f...
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| Format: | Article |
| Language: | English |
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IEEE
2023-01-01
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| Series: | IEEE Access |
| Subjects: | |
| Online Access: | https://ieeexplore.ieee.org/document/10119163/ |
| _version_ | 1797822171628699648 |
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| author | Anant Saraswat Kumar Abhishek Hiteshwar Kumar Azad S. Shitharth |
| author_facet | Anant Saraswat Kumar Abhishek Hiteshwar Kumar Azad S. Shitharth |
| author_sort | Anant Saraswat |
| collection | DOAJ |
| description | Energy consumption has become an essential factor in designing modern computer system architecture. Because of physical limits, the termination of Moore’s law and Dennard’s scaling has forced the computer design community to investigate new approaches to meet the requirements for computing resources. Approximate computing has emerged as a promising method for reducing energy consumption while trading a controllable quality loss. This paper asserts that an approximated cache coherence protocol preserves overall energy for computation. We can approximate the cache coherence protocol by adding approximated cache lines to a certain level without hindering the output. This paper introduces an enhanced approximated version of the MSI (Modified Shared Invalid) cache coherence protocol MSI-A (Modified Shared Invalid-Approx). We have verified MSI-A and MSI by employing LTL specifications in the NuSMV model checker. To illustrate the benefits of MSI-A, we have added DTMC (Discrete-Time Markov Chain) with PCTL (Probabilistic Computational Tree Logic). Although the PCTL proves the theory of approximation, we have also simulated the MSI-A in the TEJAS hardware simulator on PARSEC 3.0 to investigate the energy gains and cycle gains of MSI-A in varied applications. The cache lines considered to be approx are between 10 and 30 percent. Each application benefited from approximation according to its nature, and VIPS has indicated a total energy gain of 30.18 percent. |
| first_indexed | 2024-03-13T10:04:00Z |
| format | Article |
| id | doaj.art-16eb71f3e20f4ea28cded71e29d43861 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-03-13T10:04:00Z |
| publishDate | 2023-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-16eb71f3e20f4ea28cded71e29d438612023-05-22T23:00:35ZengIEEEIEEE Access2169-35362023-01-0111481234813510.1109/ACCESS.2023.327321910119163MSI-A: An Energy Efficient Approximated Cache Coherence ProtocolAnant Saraswat0Kumar Abhishek1https://orcid.org/0000-0001-6825-2392Hiteshwar Kumar Azad2https://orcid.org/0000-0002-4121-8941S. Shitharth3https://orcid.org/0000-0002-4931-724XDepartment of Computer Science and Engineering, National Institute of Technology Patna, Bihar, Patna, IndiaDepartment of Computer Science and Engineering, National Institute of Technology Patna, Bihar, Patna, IndiaSchool of Computer Science and Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, IndiaDepartment of Computer Science, Kebri Dehar University, Kebri Dehar, EthiopiaEnergy consumption has become an essential factor in designing modern computer system architecture. Because of physical limits, the termination of Moore’s law and Dennard’s scaling has forced the computer design community to investigate new approaches to meet the requirements for computing resources. Approximate computing has emerged as a promising method for reducing energy consumption while trading a controllable quality loss. This paper asserts that an approximated cache coherence protocol preserves overall energy for computation. We can approximate the cache coherence protocol by adding approximated cache lines to a certain level without hindering the output. This paper introduces an enhanced approximated version of the MSI (Modified Shared Invalid) cache coherence protocol MSI-A (Modified Shared Invalid-Approx). We have verified MSI-A and MSI by employing LTL specifications in the NuSMV model checker. To illustrate the benefits of MSI-A, we have added DTMC (Discrete-Time Markov Chain) with PCTL (Probabilistic Computational Tree Logic). Although the PCTL proves the theory of approximation, we have also simulated the MSI-A in the TEJAS hardware simulator on PARSEC 3.0 to investigate the energy gains and cycle gains of MSI-A in varied applications. The cache lines considered to be approx are between 10 and 30 percent. Each application benefited from approximation according to its nature, and VIPS has indicated a total energy gain of 30.18 percent.https://ieeexplore.ieee.org/document/10119163/Approximationcache coherenceNuSMVformal verificationtemporal logiccomputation |
| spellingShingle | Anant Saraswat Kumar Abhishek Hiteshwar Kumar Azad S. Shitharth MSI-A: An Energy Efficient Approximated Cache Coherence Protocol IEEE Access Approximation cache coherence NuSMV formal verification temporal logic computation |
| title | MSI-A: An Energy Efficient Approximated Cache Coherence Protocol |
| title_full | MSI-A: An Energy Efficient Approximated Cache Coherence Protocol |
| title_fullStr | MSI-A: An Energy Efficient Approximated Cache Coherence Protocol |
| title_full_unstemmed | MSI-A: An Energy Efficient Approximated Cache Coherence Protocol |
| title_short | MSI-A: An Energy Efficient Approximated Cache Coherence Protocol |
| title_sort | msi a an energy efficient approximated cache coherence protocol |
| topic | Approximation cache coherence NuSMV formal verification temporal logic computation |
| url | https://ieeexplore.ieee.org/document/10119163/ |
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