A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS
A high-speed programmable frequency divider for a Ka-band phase-locked loop (PLL)-type frequency synthesizer system is presented and fabricated in 90 nm CMOS technology. It consists mainly of a divided-by-8/9 dual-modulus prescaler (DMP) and pulse swallow counters. An active-inductor-based source-co...
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| Format: | Article |
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MDPI AG
2021-10-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/10/20/2494 |
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| author | Lu Tang Kuidong Chen Youming Zhang Xusheng Tang Changchun Zhang |
| author_facet | Lu Tang Kuidong Chen Youming Zhang Xusheng Tang Changchun Zhang |
| author_sort | Lu Tang |
| collection | DOAJ |
| description | A high-speed programmable frequency divider for a Ka-band phase-locked loop (PLL)-type frequency synthesizer system is presented and fabricated in 90 nm CMOS technology. It consists mainly of a divided-by-8/9 dual-modulus prescaler (DMP) and pulse swallow counters. An active-inductor-based source-coupled logic (SCL) D flip-flop (DFF) and the “OR” gate are used in the DMP in order to promote its locking range and operation frequency. The measured operation frequency range of the improved programmable frequency divider covers from 6 to 20 GHz with a low phase noise of less than −136 dBc/Hz at a 1 MHz offset of output signals, an optimum sensitivity of −27 dBm at 15 GHz, and a low power consumption of 9.1 mW. |
| first_indexed | 2024-03-10T06:36:16Z |
| format | Article |
| id | doaj.art-177049276dc9467581f8bc79dbe199ce |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T06:36:16Z |
| publishDate | 2021-10-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-177049276dc9467581f8bc79dbe199ce2023-11-22T18:02:07ZengMDPI AGElectronics2079-92922021-10-011020249410.3390/electronics10202494A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOSLu Tang0Kuidong Chen1Youming Zhang2Xusheng Tang3Changchun Zhang4School of Information Science and Engineering, Southeast University, Nanjing 210096, ChinaSchool of Information Science and Engineering, Southeast University, Nanjing 210096, ChinaSchool of Cyber Science and Engineering, Southeast University, Nanjing 211189, ChinaSchool of Cyber Science and Engineering, Southeast University, Nanjing 211189, ChinaCollege of Electronic and Optical Engineering & College of Microelectronics, Nanjing University of Posts and Telecommunications, Nanjing 210023, ChinaA high-speed programmable frequency divider for a Ka-band phase-locked loop (PLL)-type frequency synthesizer system is presented and fabricated in 90 nm CMOS technology. It consists mainly of a divided-by-8/9 dual-modulus prescaler (DMP) and pulse swallow counters. An active-inductor-based source-coupled logic (SCL) D flip-flop (DFF) and the “OR” gate are used in the DMP in order to promote its locking range and operation frequency. The measured operation frequency range of the improved programmable frequency divider covers from 6 to 20 GHz with a low phase noise of less than −136 dBc/Hz at a 1 MHz offset of output signals, an optimum sensitivity of −27 dBm at 15 GHz, and a low power consumption of 9.1 mW.https://www.mdpi.com/2079-9292/10/20/2494frequency dividerdual-modulus prescalerpulse swallowphase-locked loop |
| spellingShingle | Lu Tang Kuidong Chen Youming Zhang Xusheng Tang Changchun Zhang A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS Electronics frequency divider dual-modulus prescaler pulse swallow phase-locked loop |
| title | A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS |
| title_full | A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS |
| title_fullStr | A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS |
| title_full_unstemmed | A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS |
| title_short | A High-Speed Programmable Frequency Divider for a Ka-Band Phase Locked Loop-Type Frequency Synthesizer in 90-nm CMOS |
| title_sort | high speed programmable frequency divider for a ka band phase locked loop type frequency synthesizer in 90 nm cmos |
| topic | frequency divider dual-modulus prescaler pulse swallow phase-locked loop |
| url | https://www.mdpi.com/2079-9292/10/20/2494 |
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