VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT
It has always been a major issue for a hospital to acquire real-time information about a patient in emergency situations. Because of this, this research presents a novel high-compression-ratio and real-time-process image compression very-large-scale integration (VLSI) design for image sensors in the...
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| Format: | Article |
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MDPI AG
2023-02-01
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| Series: | Sensors |
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| Online Access: | https://www.mdpi.com/1424-8220/23/3/1573 |
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| author | Shih-Lun Chen He-Sheng Chou Shih-Yao Ke Chiung-An Chen Tsung-Yi Chen Mei-Ling Chan Patricia Angela R. Abu Liang-Hung Wang Kuo-Chen Li |
| author_facet | Shih-Lun Chen He-Sheng Chou Shih-Yao Ke Chiung-An Chen Tsung-Yi Chen Mei-Ling Chan Patricia Angela R. Abu Liang-Hung Wang Kuo-Chen Li |
| author_sort | Shih-Lun Chen |
| collection | DOAJ |
| description | It has always been a major issue for a hospital to acquire real-time information about a patient in emergency situations. Because of this, this research presents a novel high-compression-ratio and real-time-process image compression very-large-scale integration (VLSI) design for image sensors in the Internet of Things (IoT). The design consists of a YEF transform, color sampling, block truncation coding (BTC), threshold optimization, sub-sampling, prediction, quantization, and Golomb–Rice coding. By using machine learning, different BTC parameters are trained to achieve the optimal solution given the parameters. Two optimal reconstruction values and bitmaps for each 4 × 4 block are achieved. An image is divided into 4 × 4 blocks by BTC for numerical conversion and removing inter-pixel redundancy. The sub-sampling, prediction, and quantization steps are performed to reduce redundant information. Finally, the value with a high probability will be coded using Golomb–Rice coding. The proposed algorithm has a higher compression ratio than traditional BTC-based image compression algorithms. Moreover, this research also proposes a real-time image compression chip design based on low-complexity and pipelined architecture by using TSMC 0.18 μm CMOS technology. The operating frequency of the chip can achieve 100 MHz. The core area and the number of logic gates are 598,880 μm<sup>2</sup> and 56.3 K, respectively. In addition, this design achieves 50 frames per second, which is suitable for real-time CMOS image sensor compression. |
| first_indexed | 2024-03-11T09:24:48Z |
| format | Article |
| id | doaj.art-1781a8a1445f4d92b8a191c5d317e80f |
| institution | Directory Open Access Journal |
| issn | 1424-8220 |
| language | English |
| last_indexed | 2024-03-11T09:24:48Z |
| publishDate | 2023-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Sensors |
| spelling | doaj.art-1781a8a1445f4d92b8a191c5d317e80f2023-11-16T18:03:03ZengMDPI AGSensors1424-82202023-02-01233157310.3390/s23031573VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoTShih-Lun Chen0He-Sheng Chou1Shih-Yao Ke2Chiung-An Chen3Tsung-Yi Chen4Mei-Ling Chan5Patricia Angela R. Abu6Liang-Hung Wang7Kuo-Chen Li8Department of Electronic Engineering, Chung Yuan Christian University, Taoyuan City 320317, TaiwanDepartment of Electronic Engineering, Chung Yuan Christian University, Taoyuan City 320317, TaiwanDepartment of Electronic Engineering, Chung Yuan Christian University, Taoyuan City 320317, TaiwanDepartment of Electrical Engineering, Ming Chi University of Technology, New Taipei City 243303, TaiwanDepartment of Electronic Engineering, Chung Yuan Christian University, Taoyuan City 320317, TaiwanDepartment of Electronic Engineering, Chung Yuan Christian University, Taoyuan City 320317, TaiwanDepartment of Information Systems and Computer Science, Ateneo de Manila University, Quezon City 1108, PhilippinesDepartment of Microelectronics, College of Physics and Information Engineering, Fuzhou University, Fuzhou 350025, ChinaDepartment of Information Management, Chung Yuan Christian University, Taoyuan City 320317, TaiwanIt has always been a major issue for a hospital to acquire real-time information about a patient in emergency situations. Because of this, this research presents a novel high-compression-ratio and real-time-process image compression very-large-scale integration (VLSI) design for image sensors in the Internet of Things (IoT). The design consists of a YEF transform, color sampling, block truncation coding (BTC), threshold optimization, sub-sampling, prediction, quantization, and Golomb–Rice coding. By using machine learning, different BTC parameters are trained to achieve the optimal solution given the parameters. Two optimal reconstruction values and bitmaps for each 4 × 4 block are achieved. An image is divided into 4 × 4 blocks by BTC for numerical conversion and removing inter-pixel redundancy. The sub-sampling, prediction, and quantization steps are performed to reduce redundant information. Finally, the value with a high probability will be coded using Golomb–Rice coding. The proposed algorithm has a higher compression ratio than traditional BTC-based image compression algorithms. Moreover, this research also proposes a real-time image compression chip design based on low-complexity and pipelined architecture by using TSMC 0.18 μm CMOS technology. The operating frequency of the chip can achieve 100 MHz. The core area and the number of logic gates are 598,880 μm<sup>2</sup> and 56.3 K, respectively. In addition, this design achieves 50 frames per second, which is suitable for real-time CMOS image sensor compression.https://www.mdpi.com/1424-8220/23/3/1573image sensormachine learningIoTblock truncation codingbit mapYEF color space |
| spellingShingle | Shih-Lun Chen He-Sheng Chou Shih-Yao Ke Chiung-An Chen Tsung-Yi Chen Mei-Ling Chan Patricia Angela R. Abu Liang-Hung Wang Kuo-Chen Li VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT Sensors image sensor machine learning IoT block truncation coding bit map YEF color space |
| title | VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT |
| title_full | VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT |
| title_fullStr | VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT |
| title_full_unstemmed | VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT |
| title_short | VLSI Design Based on Block Truncation Coding for Real-Time Color Image Compression for IoT |
| title_sort | vlsi design based on block truncation coding for real time color image compression for iot |
| topic | image sensor machine learning IoT block truncation coding bit map YEF color space |
| url | https://www.mdpi.com/1424-8220/23/3/1573 |
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