| Summary: | The development of electronic devices, in terms of size and speed, depends on manufacturing technology, which is based mainly on CMOS technology. There are several challenges in CMOS technology, particularly in terms of short channel effects. It is expected that CMOS technology will soon reach the scaling-down limit due to dissipated power, which prevents an increase in the number of devices on a single chip. In contrast, QCA technology is considered an alternative solution to CMOS, among several technologies. Due to its many features, this technology has attracted the attention of scientists, who have built different logic circuits using this technique. In this paper, a new QCA T Flip-Flop structure has been built which is used to create effective synchronous counters of various sizes. The proposed flip-flop achieved a 17 % and 5 % improvement in terms of cell count and area, respectively, while a 25 % and 13 % delay reduction were observed in the proposed 2-bit and 3-bit synchronous counters, respectively.
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