New multilevel inverter based on reduced switch basic cell for high voltage levels
Abstract In this study, to solve total harmonic distortion (THD) and voltage stress on switches, challenges have been made by presenting a new multi‐level inverter (MLI). The proposed topology can operate with both symmetric and asymmetric sources. The proposed topology in symmetric and asymmetric m...
Main Authors: | , , , |
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Format: | Article |
Language: | English |
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Wiley
2024-03-01
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Series: | IET Power Electronics |
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Online Access: | https://doi.org/10.1049/pel2.12673 |
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author | Ali Seifi Seyed Hossein Hosseini Mehrdad Tarafdar Hagh Majid Hosseinpour |
author_facet | Ali Seifi Seyed Hossein Hosseini Mehrdad Tarafdar Hagh Majid Hosseinpour |
author_sort | Ali Seifi |
collection | DOAJ |
description | Abstract In this study, to solve total harmonic distortion (THD) and voltage stress on switches, challenges have been made by presenting a new multi‐level inverter (MLI). The proposed topology can operate with both symmetric and asymmetric sources. The proposed topology in symmetric and asymmetric mode with 18 switches can produce 17 and 49 voltage levels, respectively, with THD values of 4.14% and 1.45%, which passes the IEEE harmonic standard. The main advantage of the proposed topology is reducing the number of circuit devices, which reduces the price, volume, and complexity of the circuit by reducing the number of circuit devices. The proposed topology reduces the THD, the number of power electronics components, and voltage stress by increasing the output levels. The proposed topology is compared with other topologies and the advantage of the proposed topology is shown in terms of the number of switches and drivers. In addition, the proposed topology is compared in terms of the cost function. The power losses based on the thermal model of the proposed topology have been analysed and simulated. Simulation and experimental results are presented for different scenarios such as load type, load changes, and modulation index changes to validate the proposed topology. |
first_indexed | 2024-04-25T00:39:23Z |
format | Article |
id | doaj.art-1fbe50b02cf44034a22e035685630cd2 |
institution | Directory Open Access Journal |
issn | 1755-4535 1755-4543 |
language | English |
last_indexed | 2024-04-25T00:39:23Z |
publishDate | 2024-03-01 |
publisher | Wiley |
record_format | Article |
series | IET Power Electronics |
spelling | doaj.art-1fbe50b02cf44034a22e035685630cd22024-03-12T11:30:28ZengWileyIET Power Electronics1755-45351755-45432024-03-0117455156310.1049/pel2.12673New multilevel inverter based on reduced switch basic cell for high voltage levelsAli Seifi0Seyed Hossein Hosseini1Mehrdad Tarafdar Hagh2Majid Hosseinpour3Faculty of Electrical and Computer Engineering University of Tabriz Tabriz IranFaculty of Electrical and Computer Engineering University of Tabriz Tabriz IranFaculty of Electrical and Computer Engineering University of Tabriz Tabriz IranDepartment of Electrical Engineering University of Mohaghegh Ardabili Ardabil IranAbstract In this study, to solve total harmonic distortion (THD) and voltage stress on switches, challenges have been made by presenting a new multi‐level inverter (MLI). The proposed topology can operate with both symmetric and asymmetric sources. The proposed topology in symmetric and asymmetric mode with 18 switches can produce 17 and 49 voltage levels, respectively, with THD values of 4.14% and 1.45%, which passes the IEEE harmonic standard. The main advantage of the proposed topology is reducing the number of circuit devices, which reduces the price, volume, and complexity of the circuit by reducing the number of circuit devices. The proposed topology reduces the THD, the number of power electronics components, and voltage stress by increasing the output levels. The proposed topology is compared with other topologies and the advantage of the proposed topology is shown in terms of the number of switches and drivers. In addition, the proposed topology is compared in terms of the cost function. The power losses based on the thermal model of the proposed topology have been analysed and simulated. Simulation and experimental results are presented for different scenarios such as load type, load changes, and modulation index changes to validate the proposed topology.https://doi.org/10.1049/pel2.12673DC‐AC power convertorsinvertorspower convertorspower electronics |
spellingShingle | Ali Seifi Seyed Hossein Hosseini Mehrdad Tarafdar Hagh Majid Hosseinpour New multilevel inverter based on reduced switch basic cell for high voltage levels IET Power Electronics DC‐AC power convertors invertors power convertors power electronics |
title | New multilevel inverter based on reduced switch basic cell for high voltage levels |
title_full | New multilevel inverter based on reduced switch basic cell for high voltage levels |
title_fullStr | New multilevel inverter based on reduced switch basic cell for high voltage levels |
title_full_unstemmed | New multilevel inverter based on reduced switch basic cell for high voltage levels |
title_short | New multilevel inverter based on reduced switch basic cell for high voltage levels |
title_sort | new multilevel inverter based on reduced switch basic cell for high voltage levels |
topic | DC‐AC power convertors invertors power convertors power electronics |
url | https://doi.org/10.1049/pel2.12673 |
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