| Summary: | The ternary logic provides the large number of the information over the conventional binary logic. Moreover, the graphene nanoribbon-based transistor (GNRFET) is the best technology to implement the ternary logic circuits because it offers excellent properties (i.e., the threshold-voltage is controlled by varying GNR sheet-width). Due to remarkable properties of ternary logic and GNRFET, this work presents the various schematics such as NAND, NOR, AND and OR using GNRFETs and ternary logic. The HSPICE-tool is used to develop the proposed schematics and investigate delay, power and power-delay-product (PDP), respectively. In addition, the obtained performances are compared to existing CNTFET ternary circuits to prove the efficiency. From the analysis, it is noticed that the proposed designs show high-performance up to 39.40 % than conventional CNTFET designs. Furthermore, the process (oxide thickness), voltage (power supply) and temperature (PVT) variations are also carried out. It is noticed that the performance is affected by the voltage and temperature variations, whereas the minimum variations on performance is observed for oxide thickness variations.
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