Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver
This paper presents an adaptive dead-time control circuit for a maximum work frequency 20 MHz, maximum voltage level 90 V GaN gate driver. The dead-time is set to prevent straight-through of the upper and lower power transistors of the bridge arm structure and ensure the reliability of the motor dri...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2023-01-01
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| Series: | Electronics |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2079-9292/12/1/211 |
| _version_ | 1797625944628789248 |
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| author | Yifan Hu Yong Wang Ying Wang Ling Peng Ying Kong |
| author_facet | Yifan Hu Yong Wang Ying Wang Ling Peng Ying Kong |
| author_sort | Yifan Hu |
| collection | DOAJ |
| description | This paper presents an adaptive dead-time control circuit for a maximum work frequency 20 MHz, maximum voltage level 90 V GaN gate driver. The dead-time is set to prevent straight-through of the upper and lower power transistors of the bridge arm structure and ensure the reliability of the motor driver. For GaN drivers on the market today, fixed or configurable dead-time is widely used in more-than-10 MHz application scenarios. However, the switching loss caused by insufficient dead-time and reverse turn-on loss caused by excessive dead-time of GaN devices have a hazardous influence on the efficiency of drivers, which fixed or configurable dead-time cannot avoid. The gate driver with the proposed adaptive dead-time control circuit has been implemented in a 0.18 um BCD process. The proposed adaptive control circuit dissipates 56.3 uA quiescent current in a simulation situation and is able to provide maximum 5 ns dead-time error for a GaN gate driver. |
| first_indexed | 2024-03-11T10:03:39Z |
| format | Article |
| id | doaj.art-223bee8c1b4948d58709d4821eea4c33 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-11T10:03:39Z |
| publishDate | 2023-01-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-223bee8c1b4948d58709d4821eea4c332023-11-16T15:12:37ZengMDPI AGElectronics2079-92922023-01-0112121110.3390/electronics12010211Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate DriverYifan Hu0Yong Wang1Ying Wang2Ling Peng3Ying Kong4Beijing Microelectronics Technology Institute, Beijing 100076, ChinaBeijing Microelectronics Technology Institute, Beijing 100076, ChinaBeijing Microelectronics Technology Institute, Beijing 100076, ChinaBeijing Microelectronics Technology Institute, Beijing 100076, ChinaBeijing Microelectronics Technology Institute, Beijing 100076, ChinaThis paper presents an adaptive dead-time control circuit for a maximum work frequency 20 MHz, maximum voltage level 90 V GaN gate driver. The dead-time is set to prevent straight-through of the upper and lower power transistors of the bridge arm structure and ensure the reliability of the motor driver. For GaN drivers on the market today, fixed or configurable dead-time is widely used in more-than-10 MHz application scenarios. However, the switching loss caused by insufficient dead-time and reverse turn-on loss caused by excessive dead-time of GaN devices have a hazardous influence on the efficiency of drivers, which fixed or configurable dead-time cannot avoid. The gate driver with the proposed adaptive dead-time control circuit has been implemented in a 0.18 um BCD process. The proposed adaptive control circuit dissipates 56.3 uA quiescent current in a simulation situation and is able to provide maximum 5 ns dead-time error for a GaN gate driver.https://www.mdpi.com/2079-9292/12/1/211adaptive dead-time controlGaN gate driverdead-time error |
| spellingShingle | Yifan Hu Yong Wang Ying Wang Ling Peng Ying Kong Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver Electronics adaptive dead-time control GaN gate driver dead-time error |
| title | Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver |
| title_full | Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver |
| title_fullStr | Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver |
| title_full_unstemmed | Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver |
| title_short | Adaptive Dead-Time Control Design with Low Dead-Time Error in 20 MHz 90 V GaN Gate Driver |
| title_sort | adaptive dead time control design with low dead time error in 20 mhz 90 v gan gate driver |
| topic | adaptive dead-time control GaN gate driver dead-time error |
| url | https://www.mdpi.com/2079-9292/12/1/211 |
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