Memory-Tree Based Design of Optical Character Recognition in FPGA
As one of the fields of Artificial Intelligence (AI), Optical Character Recognition (OCR) systems have wide application in both industrial production and daily life. Conventional OCR systems are commonly designed and implement data computation on the basis of microprocessors; the performance of the...
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| Format: | Article |
| Language: | English |
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MDPI AG
2023-02-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/12/3/754 |
| _version_ | 1797624732657385472 |
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| author | Ke Yu Minguk Kim Jun Rim Choi |
| author_facet | Ke Yu Minguk Kim Jun Rim Choi |
| author_sort | Ke Yu |
| collection | DOAJ |
| description | As one of the fields of Artificial Intelligence (AI), Optical Character Recognition (OCR) systems have wide application in both industrial production and daily life. Conventional OCR systems are commonly designed and implement data computation on the basis of microprocessors; the performance of the processor relates to the effect of the computation. However, due to the “Memory-wall” problem and Von Neumann bottlenecks, the drawbacks of traditional processor-based computing for OCR systems are gradually becoming apparent. In this paper, an approach based on the Memory-Centric Computing and “Memory-Tree” algorithm has been proposed to perform hardware optimization of traditional OCR systems. The proposed algorithm was first designed in software implementation using C/C++ and OpenCV to verify the feasibility of the idea and then the RTL conversion of the algorithm was done using the Xilinx Vitis High Level Synthesis (HLS) tool to implement the hardware. This work chose Xilinx Alveo U50 FPGA Accelerator to complete the hardware design, which can be connected to the x86 CPU in the PC by PCIe to form heterogeneous computing. The results of the hardware implementation show that the system this work designed can recognize characters of English capital letters and numbers within 34.24 us. The power of FPGA is 18.59 W, which saves 77.87% of energy consumption compared to the 84 W of the processor in PC. |
| first_indexed | 2024-03-11T09:46:43Z |
| format | Article |
| id | doaj.art-22e126d50ef44bee94ec650c85a58a79 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-11T09:46:43Z |
| publishDate | 2023-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-22e126d50ef44bee94ec650c85a58a792023-11-16T16:31:01ZengMDPI AGElectronics2079-92922023-02-0112375410.3390/electronics12030754Memory-Tree Based Design of Optical Character Recognition in FPGAKe Yu0Minguk Kim1Jun Rim Choi2School of Electronic and Electrical Engineering, Kyungpook National University, Daegu 41566, Republic of KoreaSchool of Electronics Engineering, College of IT Engineering, Kyungpook National University, Daegu 41566, Republic of KoreaSchool of Electronic and Electrical Engineering, Kyungpook National University, Daegu 41566, Republic of KoreaAs one of the fields of Artificial Intelligence (AI), Optical Character Recognition (OCR) systems have wide application in both industrial production and daily life. Conventional OCR systems are commonly designed and implement data computation on the basis of microprocessors; the performance of the processor relates to the effect of the computation. However, due to the “Memory-wall” problem and Von Neumann bottlenecks, the drawbacks of traditional processor-based computing for OCR systems are gradually becoming apparent. In this paper, an approach based on the Memory-Centric Computing and “Memory-Tree” algorithm has been proposed to perform hardware optimization of traditional OCR systems. The proposed algorithm was first designed in software implementation using C/C++ and OpenCV to verify the feasibility of the idea and then the RTL conversion of the algorithm was done using the Xilinx Vitis High Level Synthesis (HLS) tool to implement the hardware. This work chose Xilinx Alveo U50 FPGA Accelerator to complete the hardware design, which can be connected to the x86 CPU in the PC by PCIe to form heterogeneous computing. The results of the hardware implementation show that the system this work designed can recognize characters of English capital letters and numbers within 34.24 us. The power of FPGA is 18.59 W, which saves 77.87% of energy consumption compared to the 84 W of the processor in PC.https://www.mdpi.com/2079-9292/12/3/754Optical Character RecognitionMemory-TreeVon NeumannMemory-Centric Computingcomputer visionhigh level synthesis |
| spellingShingle | Ke Yu Minguk Kim Jun Rim Choi Memory-Tree Based Design of Optical Character Recognition in FPGA Electronics Optical Character Recognition Memory-Tree Von Neumann Memory-Centric Computing computer vision high level synthesis |
| title | Memory-Tree Based Design of Optical Character Recognition in FPGA |
| title_full | Memory-Tree Based Design of Optical Character Recognition in FPGA |
| title_fullStr | Memory-Tree Based Design of Optical Character Recognition in FPGA |
| title_full_unstemmed | Memory-Tree Based Design of Optical Character Recognition in FPGA |
| title_short | Memory-Tree Based Design of Optical Character Recognition in FPGA |
| title_sort | memory tree based design of optical character recognition in fpga |
| topic | Optical Character Recognition Memory-Tree Von Neumann Memory-Centric Computing computer vision high level synthesis |
| url | https://www.mdpi.com/2079-9292/12/3/754 |
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