Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA)
The widespread use of the Internet of things (IoT) in different aspects of an individual’s life like banking, wireless intelligent devices and smartphones has led to new security and performance challenges under restricted resources. The Elliptic Curve Digital Signature Algorithm (ECDSA) is the most...
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| Format: | Article |
| Language: | Arabic |
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College of Science for Women, University of Baghdad
2020-09-01
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| Series: | Baghdad Science Journal |
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| Online Access: | http://bsj.uobaghdad.edu.iq/index.php/BSJ/article/view/4033 |
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| author | Firas Ghanim Tawfeeq Alaa M. Abdul-Hadi |
| author_facet | Firas Ghanim Tawfeeq Alaa M. Abdul-Hadi |
| author_sort | Firas Ghanim Tawfeeq |
| collection | DOAJ |
| description | The widespread use of the Internet of things (IoT) in different aspects of an individual’s life like banking, wireless intelligent devices and smartphones has led to new security and performance challenges under restricted resources. The Elliptic Curve Digital Signature Algorithm (ECDSA) is the most suitable choice for the environments due to the smaller size of the encryption key and changeable security related parameters. However, major performance metrics such as area, power, latency and throughput are still customisable and based on the design requirements of the device.
The present paper puts forward an enhancement for the throughput performance metric by proposing a more efficient design for the hardware implementation of ECDSA. The design raised the throughput to 0.08207 Mbit/s, leading to an increase of 6.95% from the existing design. It also includes the design and implementation of the Universal Asynchronous Receiver Transmitter (UART) module. The present work is based on a 163-bit key-size over Koblitz curve k-163 and secure hash function SHA-1. A serial module for the underlying modular layer, high-speed architecture of Koblitz point addition and Koblitz point multiplication have been considered in this work, in addition to utilising the carry-save-multiplier, modular adder-subtractor and Extended Euclidean module for ECDSA protocols. All modules are designed using VHDL and implemented on the platform Virtex5 xc5vlx155t-3ff1738. Signature generation requires 0.55360ms, while its validation consumes 1.10947288ms. Thus, the total time required to complete both processes is equal to 1.66ms and the maximum frequency is approximately 83.477MHZ, consuming a power of 99mW with the efficiency approaching 3.39 * 10-6. |
| first_indexed | 2024-12-18T23:51:16Z |
| format | Article |
| id | doaj.art-25e69a198fe74e3abd939f83cf0a73c2 |
| institution | Directory Open Access Journal |
| issn | 2078-8665 2411-7986 |
| language | Arabic |
| last_indexed | 2024-12-18T23:51:16Z |
| publishDate | 2020-09-01 |
| publisher | College of Science for Women, University of Baghdad |
| record_format | Article |
| series | Baghdad Science Journal |
| spelling | doaj.art-25e69a198fe74e3abd939f83cf0a73c22022-12-21T20:46:55ZaraCollege of Science for Women, University of BaghdadBaghdad Science Journal2078-86652411-79862020-09-01173(Suppl.)10.21123/bsj.2020.17.3(Suppl.).1029Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA)Firas Ghanim Tawfeeq0Alaa M. Abdul-Hadi1University of BaghdadUniversity of BaghdadThe widespread use of the Internet of things (IoT) in different aspects of an individual’s life like banking, wireless intelligent devices and smartphones has led to new security and performance challenges under restricted resources. The Elliptic Curve Digital Signature Algorithm (ECDSA) is the most suitable choice for the environments due to the smaller size of the encryption key and changeable security related parameters. However, major performance metrics such as area, power, latency and throughput are still customisable and based on the design requirements of the device. The present paper puts forward an enhancement for the throughput performance metric by proposing a more efficient design for the hardware implementation of ECDSA. The design raised the throughput to 0.08207 Mbit/s, leading to an increase of 6.95% from the existing design. It also includes the design and implementation of the Universal Asynchronous Receiver Transmitter (UART) module. The present work is based on a 163-bit key-size over Koblitz curve k-163 and secure hash function SHA-1. A serial module for the underlying modular layer, high-speed architecture of Koblitz point addition and Koblitz point multiplication have been considered in this work, in addition to utilising the carry-save-multiplier, modular adder-subtractor and Extended Euclidean module for ECDSA protocols. All modules are designed using VHDL and implemented on the platform Virtex5 xc5vlx155t-3ff1738. Signature generation requires 0.55360ms, while its validation consumes 1.10947288ms. Thus, the total time required to complete both processes is equal to 1.66ms and the maximum frequency is approximately 83.477MHZ, consuming a power of 99mW with the efficiency approaching 3.39 * 10-6.http://bsj.uobaghdad.edu.iq/index.php/BSJ/article/view/4033ECDSA, Koblitz curve, UART, Maximum frequency, SHA-1 |
| spellingShingle | Firas Ghanim Tawfeeq Alaa M. Abdul-Hadi Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA) Baghdad Science Journal ECDSA, Koblitz curve, UART, Maximum frequency, SHA-1 |
| title | Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA) |
| title_full | Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA) |
| title_fullStr | Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA) |
| title_full_unstemmed | Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA) |
| title_short | Improved throughput of Elliptic Curve Digital Signature Algorithm (ECDSA) processor implementation over Koblitz curve k-163 on Field Programmable Gate Array (FPGA) |
| title_sort | improved throughput of elliptic curve digital signature algorithm ecdsa processor implementation over koblitz curve k 163 on field programmable gate array fpga |
| topic | ECDSA, Koblitz curve, UART, Maximum frequency, SHA-1 |
| url | http://bsj.uobaghdad.edu.iq/index.php/BSJ/article/view/4033 |
| work_keys_str_mv | AT firasghanimtawfeeq improvedthroughputofellipticcurvedigitalsignaturealgorithmecdsaprocessorimplementationoverkoblitzcurvek163onfieldprogrammablegatearrayfpga AT alaamabdulhadi improvedthroughputofellipticcurvedigitalsignaturealgorithmecdsaprocessorimplementationoverkoblitzcurvek163onfieldprogrammablegatearrayfpga |