Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA
Algorithms of Montgomery multiplication, point’s group operations in Jacobi representation, scalar multiplication are reviewed. The analysis and adaptation of those algorithms for efficient hardware implementation by FPGA consider several features: DSP blocks, possibility of parallel computations. R...
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Format: | Article |
Language: | English |
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Joint Stock Company "Experimental Scientific and Production Association SPELS
2014-12-01
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Series: | Безопасность информационных технологий |
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Online Access: | https://bit.mephi.ru/index.php/bit/article/view/149 |
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author | Andrey Yurievich Rodionov |
author_facet | Andrey Yurievich Rodionov |
author_sort | Andrey Yurievich Rodionov |
collection | DOAJ |
description | Algorithms of Montgomery multiplication, point’s group operations in Jacobi representation, scalar multiplication are reviewed. The analysis and adaptation of those algorithms for efficient hardware implementation by FPGA consider several features: DSP blocks, possibility of parallel computations. Results of hardware implementation are presented. |
first_indexed | 2024-03-12T19:28:21Z |
format | Article |
id | doaj.art-25f4ebf8cb6548f79cf6997e0a4def93 |
institution | Directory Open Access Journal |
issn | 2074-7128 2074-7136 |
language | English |
last_indexed | 2024-03-12T19:28:21Z |
publishDate | 2014-12-01 |
publisher | Joint Stock Company "Experimental Scientific and Production Association SPELS |
record_format | Article |
series | Безопасность информационных технологий |
spelling | doaj.art-25f4ebf8cb6548f79cf6997e0a4def932023-08-02T04:44:03ZengJoint Stock Company "Experimental Scientific and Production Association SPELSБезопасность информационных технологий2074-71282074-71362014-12-01214149Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGAAndrey Yurievich Rodionov0OKB SAPR JSCAlgorithms of Montgomery multiplication, point’s group operations in Jacobi representation, scalar multiplication are reviewed. The analysis and adaptation of those algorithms for efficient hardware implementation by FPGA consider several features: DSP blocks, possibility of parallel computations. Results of hardware implementation are presented.https://bit.mephi.ru/index.php/bit/article/view/149digital signatureGOST R 34.10efficient hardware implementationMontgomery multiplicationDSP blocksJacobi representationparallel computations |
spellingShingle | Andrey Yurievich Rodionov Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA Безопасность информационных технологий digital signature GOST R 34.10 efficient hardware implementation Montgomery multiplication DSP blocks Jacobi representation parallel computations |
title | Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA |
title_full | Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA |
title_fullStr | Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA |
title_full_unstemmed | Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA |
title_short | Efficient Hardware Implementation of the GOST R 34.10-2001, GOST R 34.10-2012 by FPGA |
title_sort | efficient hardware implementation of the gost r 34 10 2001 gost r 34 10 2012 by fpga |
topic | digital signature GOST R 34.10 efficient hardware implementation Montgomery multiplication DSP blocks Jacobi representation parallel computations |
url | https://bit.mephi.ru/index.php/bit/article/view/149 |
work_keys_str_mv | AT andreyyurievichrodionov efficienthardwareimplementationofthegostr34102001gostr34102012byfpga |