An IC architecture for RF Energy Harvesting systems
In this work we present an IC architecture for RF energy harvesting. The system has been designed with a 0.18μm CMOS SMIC technology and optimized at 900MHz. Simulation results have confirmed that the integrated system handles an incoming power typically ranging from -25 dBm to 20 dBm by rectifying...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Croatian Communications and Information Society (CCIS)
2017-06-01
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| Series: | Journal of Communications Software and Systems |
| Subjects: | |
| Online Access: | https://jcomss.fesb.unist.hr/index.php/jcomss/article/view/377 |
| Summary: | In this work we present an IC architecture for RF energy harvesting. The system has been designed with a 0.18μm CMOS SMIC technology and optimized at 900MHz. Simulation results have confirmed that the integrated system handles an incoming power typically ranging from -25 dBm to 20 dBm by rectifying the variable input signals into a DC voltage source with an overall efficiency up to 50%. The chip area estimation for the proposed system is as low as 3x3mm2. |
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| ISSN: | 1845-6421 1846-6079 |