Multi-Level Simulated Fault Injection for Data Dependent Reliability Analysis of RTL Circuit Descriptions
This paper proposes data-dependent reliability evaluation methodology for digital systems described at Register Transfer Level (RTL). It uses a hybrid hierarchical approach, combining the accuracy provided by Gate Level (GL) Simulated Fault Injection (SFI) and the low simulation overhead required...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Stefan cel Mare University of Suceava
2016-02-01
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| Series: | Advances in Electrical and Computer Engineering |
| Subjects: | |
| Online Access: | http://dx.doi.org/10.4316/AECE.2016.01013 |
| Summary: | This paper proposes data-dependent reliability evaluation methodology for digital systems described at Register
Transfer Level (RTL). It uses a hybrid hierarchical approach, combining the accuracy provided by Gate Level (GL)
Simulated Fault Injection (SFI) and the low simulation overhead required by RTL fault injection. The methodology
comprises the following steps: the correct simulation of the RTL system, according to a set of input vectors,
hierarchical decomposition of the system into basic RTL blocks, logic synthesis of basic RTL blocks, data-dependent
SFI for the GL netlists, and RTL SFI. The proposed methodology has been validated in terms of accuracy on a medium
sized circuit – the parallel comparator used in Check Node Unit (CNU) of the Low-Density Parity-Check (LDPC) decoders.
The methodology has been applied for the reliability analysis of a 128-bit Advanced Encryption Standard (AES)
crypto-core, for which the GL simulation was prohibitive in terms of required computational resources. |
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| ISSN: | 1582-7445 1844-7600 |