A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques
Abstract Multilevel inverters (MLIs) are becoming commonly increasing in high- and medium-power applications. This is because MLI has various intrinsic advantages over conventional two-level inverters, including reduced device ratings, high-quality output, and so on. Most of the traditional topologi...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
SpringerOpen
2023-01-01
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| Series: | Journal of Electrical Systems and Information Technology |
| Subjects: | |
| Online Access: | https://doi.org/10.1186/s43067-023-00071-8 |
| _version_ | 1797952611000778752 |
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| author | Vinay Kumar N. V. GowriManohar T |
| author_facet | Vinay Kumar N. V. GowriManohar T |
| author_sort | Vinay Kumar N. V. |
| collection | DOAJ |
| description | Abstract Multilevel inverters (MLIs) are becoming commonly increasing in high- and medium-power applications. This is because MLI has various intrinsic advantages over conventional two-level inverters, including reduced device ratings, high-quality output, and so on. Most of the traditional topologies are still used in key applications, and there is an increased attentiveness to emerging multilevel topologies to minimize the number of gate drivers, power semiconductor devices, and/or isolated DC sources. Although MLIs have a promising future in industry-oriented applications, their commercial acceptance has been constrained by their size cost, excessive device count, and switch complexity. To convey the drawbacks of MLIs, academics are continually developing next-generation topologies known as reduced switch count (RSC) MLIs. For various reasons throughout the past 10 years, many MLIs with RSC topologies have been described. In this study, an overview of some of the more newly proposed multilevel inverter network topologies that achieve the legitimate goal is presented. |
| first_indexed | 2024-04-10T22:49:06Z |
| format | Article |
| id | doaj.art-2a48b593cdfc43fd977ac05237a3c6c5 |
| institution | Directory Open Access Journal |
| issn | 2314-7172 |
| language | English |
| last_indexed | 2024-04-10T22:49:06Z |
| publishDate | 2023-01-01 |
| publisher | SpringerOpen |
| record_format | Article |
| series | Journal of Electrical Systems and Information Technology |
| spelling | doaj.art-2a48b593cdfc43fd977ac05237a3c6c52023-01-15T12:06:51ZengSpringerOpenJournal of Electrical Systems and Information Technology2314-71722023-01-0110112410.1186/s43067-023-00071-8A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniquesVinay Kumar N. V.0GowriManohar T1Department of Electrical and Electronics Engineering, Sri Venkateswara University College of Engineering, Sri Venkateswara UniversityDepartment of Electrical and Electronics Engineering, Sri Venkateswara University College of Engineering, Sri Venkateswara UniversityAbstract Multilevel inverters (MLIs) are becoming commonly increasing in high- and medium-power applications. This is because MLI has various intrinsic advantages over conventional two-level inverters, including reduced device ratings, high-quality output, and so on. Most of the traditional topologies are still used in key applications, and there is an increased attentiveness to emerging multilevel topologies to minimize the number of gate drivers, power semiconductor devices, and/or isolated DC sources. Although MLIs have a promising future in industry-oriented applications, their commercial acceptance has been constrained by their size cost, excessive device count, and switch complexity. To convey the drawbacks of MLIs, academics are continually developing next-generation topologies known as reduced switch count (RSC) MLIs. For various reasons throughout the past 10 years, many MLIs with RSC topologies have been described. In this study, an overview of some of the more newly proposed multilevel inverter network topologies that achieve the legitimate goal is presented.https://doi.org/10.1186/s43067-023-00071-8Multilevel invertersReduced switch topologyPulse width modulationControl techniques |
| spellingShingle | Vinay Kumar N. V. GowriManohar T A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques Journal of Electrical Systems and Information Technology Multilevel inverters Reduced switch topology Pulse width modulation Control techniques |
| title | A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques |
| title_full | A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques |
| title_fullStr | A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques |
| title_full_unstemmed | A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques |
| title_short | A comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques |
| title_sort | comprehensive survey on reduced switch count multilevel inverter topologies and modulation techniques |
| topic | Multilevel inverters Reduced switch topology Pulse width modulation Control techniques |
| url | https://doi.org/10.1186/s43067-023-00071-8 |
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