Robust and Energy-Efficient Ultra-Low-Voltage Circuit Design under Timing Constraints in 65/45 nm CMOS
Ultra-low-voltage operation improves energy efficiency of logic circuits by a factor of 10×, at the expense of speed, which is acceptable for applications with low-to-medium performance requirements such as RFID, biomedical devices and wireless sensors. However, in 65/45 nm CMOS, variability and sho...
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| Format: | Article |
| Language: | English |
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MDPI AG
2011-01-01
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| Series: | Journal of Low Power Electronics and Applications |
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| Online Access: | http://www.mdpi.com/2079-9268/1/1/1/ |