FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing

At present, the raw echo data captured by spaceborne synthetic aperture radar is usually downlinked to the ground stations for imaging and analysis. If the SAR data can be processed on-board, the processing results could be transmitted to users directly through broadcast distribution, which can grea...

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Main Authors: Ming Xu, Liang Chen, Hao Shi, Zhu Yang, Jiahao Li, Teng Long
Format: Article
Language:English
Published: IEEE 2022-01-01
Series:IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9933643/
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author Ming Xu
Liang Chen
Hao Shi
Zhu Yang
Jiahao Li
Teng Long
author_facet Ming Xu
Liang Chen
Hao Shi
Zhu Yang
Jiahao Li
Teng Long
author_sort Ming Xu
collection DOAJ
description At present, the raw echo data captured by spaceborne synthetic aperture radar is usually downlinked to the ground stations for imaging and analysis. If the SAR data can be processed on-board, the processing results could be transmitted to users directly through broadcast distribution, which can greatly reduce the delay time for emergency applications. However, on-board processing implementation faces many challenges due to the space radiation environment and limited resources of the satellite. In this article, a field programmable gate array (FPGA)-based implementation of ship detection for on-board processing is proposed, which has high efficiency in logic and memory resources. First, the hardware-oriented clustering approach is proposed. Image processing operations with similar regularity of data access can be mapped in one processing engine, which can reduce the employment of logic resources. Second, the concept of the data-buffering cycle (DBC) is proposed. The DBC provides a method to analyze the intermediate data and optimize the memory reuse. Finally, based on the above optimization methods, the FPGA-based implementation for a ship detection algorithm is presented. Compared with the traditional methods, the experimental results show the efficacy of our proposed method with lower consumption in logic and memory resources.
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spelling doaj.art-2bf6785dabde4ba19bf21e5bdae8653e2022-12-22T02:52:12ZengIEEEIEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing2151-15352022-01-01159733974510.1109/JSTARS.2022.32184409933643FPGA-Based Implementation of Ship Detection for Satellite On-Board ProcessingMing Xu0https://orcid.org/0000-0002-4687-4534Liang Chen1Hao Shi2https://orcid.org/0000-0002-2013-6592Zhu Yang3Jiahao Li4Teng Long5Radar Research Laboratory, School of Information and Electronics, Beijing Institute of Technology, Beijing, ChinaRadar Research Laboratory, Beijing Institute of Technology, Beijing, ChinaRadar Research Laboratory, Beijing Institute of Technology, Beijing, ChinaRadar Research Laboratory, School of Information and Electronics, Beijing Institute of Technology, Beijing, ChinaRadar Research Laboratory, School of Information and Electronics, Beijing Institute of Technology, Beijing, ChinaRadar Research Laboratory, School of Information and Electronics, Beijing Institute of Technology, Beijing, ChinaAt present, the raw echo data captured by spaceborne synthetic aperture radar is usually downlinked to the ground stations for imaging and analysis. If the SAR data can be processed on-board, the processing results could be transmitted to users directly through broadcast distribution, which can greatly reduce the delay time for emergency applications. However, on-board processing implementation faces many challenges due to the space radiation environment and limited resources of the satellite. In this article, a field programmable gate array (FPGA)-based implementation of ship detection for on-board processing is proposed, which has high efficiency in logic and memory resources. First, the hardware-oriented clustering approach is proposed. Image processing operations with similar regularity of data access can be mapped in one processing engine, which can reduce the employment of logic resources. Second, the concept of the data-buffering cycle (DBC) is proposed. The DBC provides a method to analyze the intermediate data and optimize the memory reuse. Finally, based on the above optimization methods, the FPGA-based implementation for a ship detection algorithm is presented. Compared with the traditional methods, the experimental results show the efficacy of our proposed method with lower consumption in logic and memory resources.https://ieeexplore.ieee.org/document/9933643/Field programmable gate array (FPGA)on-board processingprocessing engineship detection
spellingShingle Ming Xu
Liang Chen
Hao Shi
Zhu Yang
Jiahao Li
Teng Long
FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing
IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing
Field programmable gate array (FPGA)
on-board processing
processing engine
ship detection
title FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing
title_full FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing
title_fullStr FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing
title_full_unstemmed FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing
title_short FPGA-Based Implementation of Ship Detection for Satellite On-Board Processing
title_sort fpga based implementation of ship detection for satellite on board processing
topic Field programmable gate array (FPGA)
on-board processing
processing engine
ship detection
url https://ieeexplore.ieee.org/document/9933643/
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AT liangchen fpgabasedimplementationofshipdetectionforsatelliteonboardprocessing
AT haoshi fpgabasedimplementationofshipdetectionforsatelliteonboardprocessing
AT zhuyang fpgabasedimplementationofshipdetectionforsatelliteonboardprocessing
AT jiahaoli fpgabasedimplementationofshipdetectionforsatelliteonboardprocessing
AT tenglong fpgabasedimplementationofshipdetectionforsatelliteonboardprocessing