A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter
To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different puls...
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| Format: | Article |
| Language: | English |
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MDPI AG
2019-02-01
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| Series: | Energies |
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| Online Access: | https://www.mdpi.com/1996-1073/12/5/779 |
| _version_ | 1798042308296310784 |
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| author | Ming Wu Zhenhao Song Zhipeng Lv Kai Zhou Qi Cui |
| author_facet | Ming Wu Zhenhao Song Zhipeng Lv Kai Zhou Qi Cui |
| author_sort | Ming Wu |
| collection | DOAJ |
| description | To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness. |
| first_indexed | 2024-04-11T22:33:43Z |
| format | Article |
| id | doaj.art-2c502122424c48318df07b38a540506d |
| institution | Directory Open Access Journal |
| issn | 1996-1073 |
| language | English |
| last_indexed | 2024-04-11T22:33:43Z |
| publishDate | 2019-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Energies |
| spelling | doaj.art-2c502122424c48318df07b38a540506d2022-12-22T03:59:17ZengMDPI AGEnergies1996-10732019-02-0112577910.3390/en12050779en12050779A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge InverterMing Wu0Zhenhao Song1Zhipeng Lv2Kai Zhou3Qi Cui4China Electric Power Research Institute, Haidian District, Beijing 100192, ChinaChina Electric Power Research Institute, Haidian District, Beijing 100192, ChinaChina Electric Power Research Institute, Haidian District, Beijing 100192, ChinaJiangsu Province Laboratory of Mining Electric and Automation, China University of Mining and Technology, Xuzhou 221008, ChinaJiangsu Province Laboratory of Mining Electric and Automation, China University of Mining and Technology, Xuzhou 221008, ChinaTo suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.https://www.mdpi.com/1996-1073/12/5/779NPC/H Bridgefive-levelBalance of capacitor voltageSuppression of CMVSVPWM |
| spellingShingle | Ming Wu Zhenhao Song Zhipeng Lv Kai Zhou Qi Cui A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter Energies NPC/H Bridge five-level Balance of capacitor voltage Suppression of CMV SVPWM |
| title | A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter |
| title_full | A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter |
| title_fullStr | A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter |
| title_full_unstemmed | A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter |
| title_short | A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter |
| title_sort | method for the simultaneous suppression of dc capacitor fluctuations and common mode voltage in a five level npc h bridge inverter |
| topic | NPC/H Bridge five-level Balance of capacitor voltage Suppression of CMV SVPWM |
| url | https://www.mdpi.com/1996-1073/12/5/779 |
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