| Summary: | We have examined impacts of gate insulator (Al<sub>2</sub>O<sub>3</sub> or HfO<sub>2</sub>) and gate electrode (TiN or W) on electrical performance of ZnSnO/Si bilayer tunneling field-effect transistors (TFETs). It is found from the capacitance-voltage (C-V) characteristics that the W gate is effective to reduce the counter-clockwise hysteresis. Additionally, the optimal temperature of post-metallization annealing (PMA) is different for each gate stack, and this optimization is critically important for the high ON-state current (ION) and steep ON/OFF switching. The W/Al<sub>2</sub>O<sub>3</sub>/ZnSnO/Si bilayer TFET provides the hysteresis-free steep ON/OFF switching with the minimum sub-threshold swing (SS) of 65.4 mV/dec. and average SS of 72.0 mV/dec. in a gate-voltage swing of 0.3 V, which are 19% and 18% lower than the control TiN/Al<sub>2</sub>O<sub>3</sub>/ZnSnO/Si bilayer TFET. When the gate stack is replaced by W/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>, the TFET exhibits less steep ON/OFF switching in spite of thinning capacitance equivalent thickness (CET) from 5.9 and 2.3 nm. These results indicate the importance of improvement in the gate stack quality on the sub-threshold characteristics of the bilayer TFETs.
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