Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al₂O₃ Gate Stack

We have examined impacts of gate insulator (Al<sub>2</sub>O<sub>3</sub> or HfO<sub>2</sub>) and gate electrode (TiN or W) on electrical performance of ZnSnO/Si bilayer tunneling field-effect transistors (TFETs). It is found from the capacitance-voltage (C-V) chara...

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Main Authors: Kimihiko Kato, Hiroaki Matsui, Hitoshi Tabata, Takahiro Mori, Yukinori Morita, Takashi Matsukawa, Mitsuru Takenaka, Shinichi Takagi
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9044320/
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author Kimihiko Kato
Hiroaki Matsui
Hitoshi Tabata
Takahiro Mori
Yukinori Morita
Takashi Matsukawa
Mitsuru Takenaka
Shinichi Takagi
author_facet Kimihiko Kato
Hiroaki Matsui
Hitoshi Tabata
Takahiro Mori
Yukinori Morita
Takashi Matsukawa
Mitsuru Takenaka
Shinichi Takagi
author_sort Kimihiko Kato
collection DOAJ
description We have examined impacts of gate insulator (Al<sub>2</sub>O<sub>3</sub> or HfO<sub>2</sub>) and gate electrode (TiN or W) on electrical performance of ZnSnO/Si bilayer tunneling field-effect transistors (TFETs). It is found from the capacitance-voltage (C-V) characteristics that the W gate is effective to reduce the counter-clockwise hysteresis. Additionally, the optimal temperature of post-metallization annealing (PMA) is different for each gate stack, and this optimization is critically important for the high ON-state current (ION) and steep ON/OFF switching. The W/Al<sub>2</sub>O<sub>3</sub>/ZnSnO/Si bilayer TFET provides the hysteresis-free steep ON/OFF switching with the minimum sub-threshold swing (SS) of 65.4 mV/dec. and average SS of 72.0 mV/dec. in a gate-voltage swing of 0.3 V, which are 19% and 18% lower than the control TiN/Al<sub>2</sub>O<sub>3</sub>/ZnSnO/Si bilayer TFET. When the gate stack is replaced by W/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>, the TFET exhibits less steep ON/OFF switching in spite of thinning capacitance equivalent thickness (CET) from 5.9 and 2.3 nm. These results indicate the importance of improvement in the gate stack quality on the sub-threshold characteristics of the bilayer TFETs.
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spelling doaj.art-2fe5badc75f94a6cb017f287af9261962022-12-21T22:23:04ZengIEEEIEEE Journal of the Electron Devices Society2168-67342020-01-01834134510.1109/JEDS.2020.29824249044320Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate StackKimihiko Kato0https://orcid.org/0000-0002-7117-0838Hiroaki Matsui1Hitoshi Tabata2Takahiro Mori3https://orcid.org/0000-0001-5899-1060Yukinori Morita4Takashi Matsukawa5Mitsuru Takenaka6https://orcid.org/0000-0002-9852-1474Shinichi Takagi7https://orcid.org/0000-0002-5601-2604Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology, Tsukuba, JapanDepartment of Electrical Engineering and Information Systems, University of Tokyo, Tokyo, JapanDepartment of Electrical Engineering and Information Systems, University of Tokyo, Tokyo, JapanNanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology, Tsukuba, JapanNanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology, Tsukuba, JapanNanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology, Tsukuba, JapanDepartment of Electrical Engineering and Information Systems, University of Tokyo, Tokyo, JapanDepartment of Electrical Engineering and Information Systems, University of Tokyo, Tokyo, JapanWe have examined impacts of gate insulator (Al<sub>2</sub>O<sub>3</sub> or HfO<sub>2</sub>) and gate electrode (TiN or W) on electrical performance of ZnSnO/Si bilayer tunneling field-effect transistors (TFETs). It is found from the capacitance-voltage (C-V) characteristics that the W gate is effective to reduce the counter-clockwise hysteresis. Additionally, the optimal temperature of post-metallization annealing (PMA) is different for each gate stack, and this optimization is critically important for the high ON-state current (ION) and steep ON/OFF switching. The W/Al<sub>2</sub>O<sub>3</sub>/ZnSnO/Si bilayer TFET provides the hysteresis-free steep ON/OFF switching with the minimum sub-threshold swing (SS) of 65.4 mV/dec. and average SS of 72.0 mV/dec. in a gate-voltage swing of 0.3 V, which are 19% and 18% lower than the control TiN/Al<sub>2</sub>O<sub>3</sub>/ZnSnO/Si bilayer TFET. When the gate stack is replaced by W/HfO<sub>2</sub>/Al<sub>2</sub>O<sub>3</sub>, the TFET exhibits less steep ON/OFF switching in spite of thinning capacitance equivalent thickness (CET) from 5.9 and 2.3 nm. These results indicate the importance of improvement in the gate stack quality on the sub-threshold characteristics of the bilayer TFETs.https://ieeexplore.ieee.org/document/9044320/Bilayergate stackTFETsub-thresholdZnSnO
spellingShingle Kimihiko Kato
Hiroaki Matsui
Hitoshi Tabata
Takahiro Mori
Yukinori Morita
Takashi Matsukawa
Mitsuru Takenaka
Shinichi Takagi
Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate Stack
IEEE Journal of the Electron Devices Society
Bilayer
gate stack
TFET
sub-threshold
ZnSnO
title Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate Stack
title_full Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate Stack
title_fullStr Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate Stack
title_full_unstemmed Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate Stack
title_short Improvement in Electrical Characteristics of ZnSnO/Si Bilayer TFET by W/Al&#x2082;O&#x2083; Gate Stack
title_sort improvement in electrical characteristics of znsno si bilayer tfet by w al x2082 o x2083 gate stack
topic Bilayer
gate stack
TFET
sub-threshold
ZnSnO
url https://ieeexplore.ieee.org/document/9044320/
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