Elliptic-Curve Crypto Processor for RFID Applications
This work presents an Elliptic-curve Point Multiplication (ECP) architecture with a focus on low latency and low area for radio-frequency-identification (RFID) applications over <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><sema...
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MDPI AG
2021-07-01
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| Series: | Applied Sciences |
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| Online Access: | https://www.mdpi.com/2076-3417/11/15/7079 |
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| author | Muhammad Rashid Sajjad Shaukat Jamal Sikandar Zulqarnain Khan Adel R. Alharbi Amer Aljaedi Malik Imran |
| author_facet | Muhammad Rashid Sajjad Shaukat Jamal Sikandar Zulqarnain Khan Adel R. Alharbi Amer Aljaedi Malik Imran |
| author_sort | Muhammad Rashid |
| collection | DOAJ |
| description | This work presents an Elliptic-curve Point Multiplication (ECP) architecture with a focus on low latency and low area for radio-frequency-identification (RFID) applications over <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mi>G</mi><mi>F</mi><mo>(</mo><msup><mn>2</mn><mn>163</mn></msup><mo>)</mo></mrow></semantics></math></inline-formula>. To achieve low latency, we have reduced the clock cycles by using: (i) three-shift buffers in the datapath to load Elliptic-curve parameters as well as an initial point, (ii) the identical size of input/output interfaces in all building blocks of the architecture. The low area is preserved by using the same hardware resources of squaring and multiplication for inversion computation. Finally, an efficient controller is used to control the inferred logic. The proposed ECP architecture is modeled in Verilog and the synthesis results are given on three different 7-series FPGA (Field Programmable Gate Array) devices, i.e., Kintex-7, Artix-7, and Virtex-7. The performance of the architecture is provided with the integration of a schoolbook multiplier (implemented with two different logic styles, i.e., combinational and sequential). On Kintex-7, the combinational implementation style of a schoolbook multiplier results in power-optimized, i.e., 161 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>W, values with an expense of (i) hardware resources, i.e., 3561 look-up-tables and 1527 flip-flops, (ii) clock frequency, i.e., 227 MHz, and (iii) latency, i.e., 11.57 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>s. On the same Kintex-7 device, the sequential implementation style of a schoolbook multiplier provides, (i) 2.88 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>s latency, (ii) 1786 look-up-tables and 1855 flip-flops, (iii) 647 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>W power, and (iv) 909 MHz clock frequency. Therefore, the reported area, latency and power results make the proposed ECP architecture well-suited for RFID applications. |
| first_indexed | 2024-03-10T09:18:37Z |
| format | Article |
| id | doaj.art-3233c667f08140edb3755922cc2ba113 |
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| language | English |
| last_indexed | 2024-03-10T09:18:37Z |
| publishDate | 2021-07-01 |
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| record_format | Article |
| series | Applied Sciences |
| spelling | doaj.art-3233c667f08140edb3755922cc2ba1132023-11-22T05:24:06ZengMDPI AGApplied Sciences2076-34172021-07-011115707910.3390/app11157079Elliptic-Curve Crypto Processor for RFID ApplicationsMuhammad Rashid0Sajjad Shaukat Jamal1Sikandar Zulqarnain Khan2Adel R. Alharbi3Amer Aljaedi4Malik Imran5Department of Computer Engineering, Umm Al-Qura University, Makkah 24382, Saudi ArabiaDepartment of Mathematics, College of Science, King Khalid University, Abha 61413, Saudi ArabiaDepartment of Aeronautical Engineering, Estonian Aviation Academy, 61707 Tartu, EstoniaCollege of Computing and Information Technology, University of Tabuk, Tabuk 71491, Saudi ArabiaCollege of Computing and Information Technology, University of Tabuk, Tabuk 71491, Saudi ArabiaDepartment of Computer Systems, Tallinn University of Technology, 12616 Tallinn, EstoniaThis work presents an Elliptic-curve Point Multiplication (ECP) architecture with a focus on low latency and low area for radio-frequency-identification (RFID) applications over <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mrow><mi>G</mi><mi>F</mi><mo>(</mo><msup><mn>2</mn><mn>163</mn></msup><mo>)</mo></mrow></semantics></math></inline-formula>. To achieve low latency, we have reduced the clock cycles by using: (i) three-shift buffers in the datapath to load Elliptic-curve parameters as well as an initial point, (ii) the identical size of input/output interfaces in all building blocks of the architecture. The low area is preserved by using the same hardware resources of squaring and multiplication for inversion computation. Finally, an efficient controller is used to control the inferred logic. The proposed ECP architecture is modeled in Verilog and the synthesis results are given on three different 7-series FPGA (Field Programmable Gate Array) devices, i.e., Kintex-7, Artix-7, and Virtex-7. The performance of the architecture is provided with the integration of a schoolbook multiplier (implemented with two different logic styles, i.e., combinational and sequential). On Kintex-7, the combinational implementation style of a schoolbook multiplier results in power-optimized, i.e., 161 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>W, values with an expense of (i) hardware resources, i.e., 3561 look-up-tables and 1527 flip-flops, (ii) clock frequency, i.e., 227 MHz, and (iii) latency, i.e., 11.57 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>s. On the same Kintex-7 device, the sequential implementation style of a schoolbook multiplier provides, (i) 2.88 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>s latency, (ii) 1786 look-up-tables and 1855 flip-flops, (iii) 647 <inline-formula><math xmlns="http://www.w3.org/1998/Math/MathML" display="inline"><semantics><mi mathvariant="sans-serif">μ</mi></semantics></math></inline-formula>W power, and (iv) 909 MHz clock frequency. Therefore, the reported area, latency and power results make the proposed ECP architecture well-suited for RFID applications.https://www.mdpi.com/2076-3417/11/15/7079elliptic-curve cryptographycrypto processorRFIDhardware acceleratorFPGA |
| spellingShingle | Muhammad Rashid Sajjad Shaukat Jamal Sikandar Zulqarnain Khan Adel R. Alharbi Amer Aljaedi Malik Imran Elliptic-Curve Crypto Processor for RFID Applications Applied Sciences elliptic-curve cryptography crypto processor RFID hardware accelerator FPGA |
| title | Elliptic-Curve Crypto Processor for RFID Applications |
| title_full | Elliptic-Curve Crypto Processor for RFID Applications |
| title_fullStr | Elliptic-Curve Crypto Processor for RFID Applications |
| title_full_unstemmed | Elliptic-Curve Crypto Processor for RFID Applications |
| title_short | Elliptic-Curve Crypto Processor for RFID Applications |
| title_sort | elliptic curve crypto processor for rfid applications |
| topic | elliptic-curve cryptography crypto processor RFID hardware accelerator FPGA |
| url | https://www.mdpi.com/2076-3417/11/15/7079 |
| work_keys_str_mv | AT muhammadrashid ellipticcurvecryptoprocessorforrfidapplications AT sajjadshaukatjamal ellipticcurvecryptoprocessorforrfidapplications AT sikandarzulqarnainkhan ellipticcurvecryptoprocessorforrfidapplications AT adelralharbi ellipticcurvecryptoprocessorforrfidapplications AT ameraljaedi ellipticcurvecryptoprocessorforrfidapplications AT malikimran ellipticcurvecryptoprocessorforrfidapplications |