Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes
An ultralow specific on-resistance (<inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula>) accumulation-mode LDMOS (ALDMOS) is proposed and investigated by simulations and experiments. The proposed ALDMOS features two sepa...
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IEEE
2021-01-01
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Series: | IEEE Journal of the Electron Devices Society |
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Online Access: | https://ieeexplore.ieee.org/document/9546941/ |
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author | Jie Wei Kaiwei Dai Xiaorong Luo Zhen Ma Jie Li Congcong Li Bo Zhang |
author_facet | Jie Wei Kaiwei Dai Xiaorong Luo Zhen Ma Jie Li Congcong Li Bo Zhang |
author_sort | Jie Wei |
collection | DOAJ |
description | An ultralow specific on-resistance (<inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula>) accumulation-mode LDMOS (ALDMOS) is proposed and investigated by simulations and experiments. The proposed ALDMOS features two separated integrated diodes (SID) above the N-drift surface, which forms high density electron accumulation layer in the on-state. Meanwhile, the SID not only assists depleting the N-drift to increase the N-drift doping centration (<inline-formula> <tex-math notation="LaTeX">${N} _{\mathrm{ d}}$ </tex-math></inline-formula>) in the off-state, but also modulates the lateral electric field to improve the breakdown voltage (<italic>BV</italic>). Thus, the proposed SID ALDMOS could achieve ultralow <inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula> and maintain high <italic>BV</italic> simultaneously. The layout and key fabrication processes of the SID ALDMOS are demonstrated. The measured results show that the SID ALDMOS realizes a <italic>BV</italic> of 483V and <inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula> of 29.3m<inline-formula> <tex-math notation="LaTeX">$\boldsymbol{\Omega } $ </tex-math></inline-formula>.cm<sup>2</sup>, with a high FOM value of 7.96MW/cm<sup>2</sup>. Its <inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula> is decreased by 33.7% compared with triple RESURF LDMOS at the same <italic>BV</italic>. |
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language | English |
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publishDate | 2021-01-01 |
publisher | IEEE |
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series | IEEE Journal of the Electron Devices Society |
spelling | doaj.art-333d658ee3034f7a8d982b7d89e299152023-07-19T23:00:18ZengIEEEIEEE Journal of the Electron Devices Society2168-67342021-01-0191161116510.1109/JEDS.2021.31147389546941Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated DiodesJie Wei0https://orcid.org/0000-0001-6080-1748Kaiwei Dai1Xiaorong Luo2https://orcid.org/0000-0001-5973-3258Zhen Ma3Jie Li4Congcong Li5Bo Zhang6https://orcid.org/0000-0003-1288-1549State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaState Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaState Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaState Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaState Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaState Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaState Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, ChinaAn ultralow specific on-resistance (<inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula>) accumulation-mode LDMOS (ALDMOS) is proposed and investigated by simulations and experiments. The proposed ALDMOS features two separated integrated diodes (SID) above the N-drift surface, which forms high density electron accumulation layer in the on-state. Meanwhile, the SID not only assists depleting the N-drift to increase the N-drift doping centration (<inline-formula> <tex-math notation="LaTeX">${N} _{\mathrm{ d}}$ </tex-math></inline-formula>) in the off-state, but also modulates the lateral electric field to improve the breakdown voltage (<italic>BV</italic>). Thus, the proposed SID ALDMOS could achieve ultralow <inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula> and maintain high <italic>BV</italic> simultaneously. The layout and key fabrication processes of the SID ALDMOS are demonstrated. The measured results show that the SID ALDMOS realizes a <italic>BV</italic> of 483V and <inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula> of 29.3m<inline-formula> <tex-math notation="LaTeX">$\boldsymbol{\Omega } $ </tex-math></inline-formula>.cm<sup>2</sup>, with a high FOM value of 7.96MW/cm<sup>2</sup>. Its <inline-formula> <tex-math notation="LaTeX">${R} _{\mathrm{ on,sp}}$ </tex-math></inline-formula> is decreased by 33.7% compared with triple RESURF LDMOS at the same <italic>BV</italic>.https://ieeexplore.ieee.org/document/9546941/Specific on-resistanceaccumulation modeLDMOSbreakdown voltageintegrated diode |
spellingShingle | Jie Wei Kaiwei Dai Xiaorong Luo Zhen Ma Jie Li Congcong Li Bo Zhang Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes IEEE Journal of the Electron Devices Society Specific on-resistance accumulation mode LDMOS breakdown voltage integrated diode |
title | Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes |
title_full | Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes |
title_fullStr | Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes |
title_full_unstemmed | Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes |
title_short | Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes |
title_sort | analyses and experiments of ultralow specific on resistance ldmos with integrated diodes |
topic | Specific on-resistance accumulation mode LDMOS breakdown voltage integrated diode |
url | https://ieeexplore.ieee.org/document/9546941/ |
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