Design and Implementation of High Speed and Low Power 12-Bit SAR ADC Using 22nm FinFET
Successive approximation register (SAR) analog to digital converter (ADC) architecture comprises submodules such as comparator, digital to analog converters (DAC), and SAR logic. Each of these modules imposes challenges as the signal makes transition from analog to digital and vice-versa. Design str...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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Iran University of Science and Technology
2022-09-01
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| Series: | Iranian Journal of Electrical and Electronic Engineering |
| Subjects: | |
| Online Access: | http://ijeee.iust.ac.ir/article-1-2336-en.html |