Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket
In this paper, we propose and simulate a novel structure of a double source and U-shaped gate tunnel field effect transistor (DS-UTFET) with an n buffer layer and n+ SiGe pocket. In order to reduce the OFF-state current, there is an n buffer layer under the n+ SiGe pocket in a sandwich stack; moreov...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
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AIP Publishing LLC
2020-05-01
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| Series: | AIP Advances |
| Online Access: | http://dx.doi.org/10.1063/5.0006510 |
| _version_ | 1828836884817641472 |
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| author | Haiwu Xie Hongxia Liu |
| author_facet | Haiwu Xie Hongxia Liu |
| author_sort | Haiwu Xie |
| collection | DOAJ |
| description | In this paper, we propose and simulate a novel structure of a double source and U-shaped gate tunnel field effect transistor (DS-UTFET) with an n buffer layer and n+ SiGe pocket. In order to reduce the OFF-state current, there is an n buffer layer under the n+ SiGe pocket in a sandwich stack; moreover, we use a source region overlap in both the vertical and lateral directions to enhance the electric field; as a result, considerable ON-state current and a high Ion/Ioff ratio are realized in the proposed structure. In our simulation, the DS-UTFET shows better performance than the UTFET, and the simulation results indicate that the ON-state currents of the DS-UTFET with and without an n buffer layer increase up to 2.52 × 10−4 A/μm and 2.47 × 10−4 A/μm, respectively, and the average subthreshold swing of the DS-UTFET with and without an n buffer layer is 35.0 mV/dec and 52.7 mV/dec, respectively, which ensures that the DS-UTFET has a fine analog and logic feature for applications; moreover, the maximum gm of the DS-UTFET with and without an n buffer layer is 519 µS/μm and 493 µS/μm at 1.4 V drain-to-source voltage (Vds). In addition, the RF performance of devices depends on the cut-off frequency (fT) and gain bandwidth (GBW), and the DS-UTFET with and without an n buffer layer could achieve a maximum fT of 25.7 GHz and 22.5 GHz, respectively. Meanwhile, the DS-UTFET with and without an n buffer layer could achieve a maximum GBW of 3.56 GHz and 3.06 GHz, respectively. |
| first_indexed | 2024-12-12T18:30:17Z |
| format | Article |
| id | doaj.art-35cf678ecb2f4e25bb7462d5d24431ea |
| institution | Directory Open Access Journal |
| issn | 2158-3226 |
| language | English |
| last_indexed | 2024-12-12T18:30:17Z |
| publishDate | 2020-05-01 |
| publisher | AIP Publishing LLC |
| record_format | Article |
| series | AIP Advances |
| spelling | doaj.art-35cf678ecb2f4e25bb7462d5d24431ea2022-12-22T00:15:56ZengAIP Publishing LLCAIP Advances2158-32262020-05-01105055125055125-1010.1063/5.0006510Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocketHaiwu Xie0Hongxia Liu1Key Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education, Xidian University, Xi’an 710071, Shaanxi, ChinaKey Laboratory for Wide Band Gap Semiconductor Materials and Devices of Education, Xidian University, Xi’an 710071, Shaanxi, ChinaIn this paper, we propose and simulate a novel structure of a double source and U-shaped gate tunnel field effect transistor (DS-UTFET) with an n buffer layer and n+ SiGe pocket. In order to reduce the OFF-state current, there is an n buffer layer under the n+ SiGe pocket in a sandwich stack; moreover, we use a source region overlap in both the vertical and lateral directions to enhance the electric field; as a result, considerable ON-state current and a high Ion/Ioff ratio are realized in the proposed structure. In our simulation, the DS-UTFET shows better performance than the UTFET, and the simulation results indicate that the ON-state currents of the DS-UTFET with and without an n buffer layer increase up to 2.52 × 10−4 A/μm and 2.47 × 10−4 A/μm, respectively, and the average subthreshold swing of the DS-UTFET with and without an n buffer layer is 35.0 mV/dec and 52.7 mV/dec, respectively, which ensures that the DS-UTFET has a fine analog and logic feature for applications; moreover, the maximum gm of the DS-UTFET with and without an n buffer layer is 519 µS/μm and 493 µS/μm at 1.4 V drain-to-source voltage (Vds). In addition, the RF performance of devices depends on the cut-off frequency (fT) and gain bandwidth (GBW), and the DS-UTFET with and without an n buffer layer could achieve a maximum fT of 25.7 GHz and 22.5 GHz, respectively. Meanwhile, the DS-UTFET with and without an n buffer layer could achieve a maximum GBW of 3.56 GHz and 3.06 GHz, respectively.http://dx.doi.org/10.1063/5.0006510 |
| spellingShingle | Haiwu Xie Hongxia Liu Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket AIP Advances |
| title | Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket |
| title_full | Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket |
| title_fullStr | Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket |
| title_full_unstemmed | Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket |
| title_short | Design and investigation of a dual source and U-shaped gate TFET with n buffer and SiGe pocket |
| title_sort | design and investigation of a dual source and u shaped gate tfet with n buffer and sige pocket |
| url | http://dx.doi.org/10.1063/5.0006510 |
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