Design and Analysis of Low-Power and High Speed Approximate Adders Using CNFETs
Adders are constituted as the fundamental blocks of arithmetic circuits and are considered important for computation devices. Approximate computing has become a popular and developing area, promising to provide energy-efficient circuits with low power and high performance. In this paper, 10T approxi...
Main Authors: | Avireni Bhargav, Phat Huynh |
---|---|
Format: | Article |
Language: | English |
Published: |
MDPI AG
2021-12-01
|
Series: | Sensors |
Subjects: | |
Online Access: | https://www.mdpi.com/1424-8220/21/24/8203 |
Similar Items
-
A Novel High-Speed and Low-PDP Approximate Full Adder Cell for Image Blending
by: Seyed Hossein Shahrokhi, et al.
Published: (2023-06-01) -
Neoteric Design Power Sustained 3-Bit Asynchronous Counter Using CNFET Based MCML Topology
by: Ramsha Suhail, et al.
Published: (2022-01-01) -
Design of low power high-speed full, swing 11T CNTFET adder
by: B. Anjaneyulu, et al.
Published: (2024-06-01) -
Design and Analysis of an Approximate Adder with Hybrid Error Reduction
by: Hyoju Seo, et al.
Published: (2020-03-01) -
COREA: Delay- and Energy-Efficient Approximate Adder Using Effective Carry Speculation
by: Hyelin Seok, et al.
Published: (2021-09-01)