Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations

Abstract A dual‐gate anti‐ambipolar transistor (AAT) with a two‐dimensional ReS2 and WSe2 heterojunction is developed. The characteristic Λ‐shaped transfer curves yielded by the bottom‐gate voltage are effectively controlled by the top‐gate voltage. This feature is applied to logic operations, with...

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Main Authors: Yoshitaka Shingaya, Amir Zulkefli, Takuya Iwasaki, Ryoma Hayakawa, Shu Nakaharai, Kenji Watanabe, Takashi Taniguchi, Yutaka Wakayama
Format: Article
Language:English
Published: Wiley-VCH 2023-01-01
Series:Advanced Electronic Materials
Subjects:
Online Access:https://doi.org/10.1002/aelm.202200704
_version_ 1797772511637667840
author Yoshitaka Shingaya
Amir Zulkefli
Takuya Iwasaki
Ryoma Hayakawa
Shu Nakaharai
Kenji Watanabe
Takashi Taniguchi
Yutaka Wakayama
author_facet Yoshitaka Shingaya
Amir Zulkefli
Takuya Iwasaki
Ryoma Hayakawa
Shu Nakaharai
Kenji Watanabe
Takashi Taniguchi
Yutaka Wakayama
author_sort Yoshitaka Shingaya
collection DOAJ
description Abstract A dual‐gate anti‐ambipolar transistor (AAT) with a two‐dimensional ReS2 and WSe2 heterojunction is developed. The characteristic Λ‐shaped transfer curves yielded by the bottom‐gate voltage are effectively controlled by the top‐gate voltage. This feature is applied to logic operations, with the bottom‐ and top‐gate voltages acting as two input signals and the drain current (Id) monitored as an output signal. Importantly, a single dual‐gate AAT exhibits all the two‐input logic operations (AND, OR, XOR, NAND, NOR, and XNOR) under optimized input voltages. Additionally, drain voltage (Vd)‐induced switching between AND and OR logic operations is achieved. These features are advantageous for simplifying circuit design.
first_indexed 2024-03-12T21:51:58Z
format Article
id doaj.art-3893960294d244a7a799c9e01c2aaff1
institution Directory Open Access Journal
issn 2199-160X
language English
last_indexed 2024-03-12T21:51:58Z
publishDate 2023-01-01
publisher Wiley-VCH
record_format Article
series Advanced Electronic Materials
spelling doaj.art-3893960294d244a7a799c9e01c2aaff12023-07-26T01:35:51ZengWiley-VCHAdvanced Electronic Materials2199-160X2023-01-0191n/an/a10.1002/aelm.202200704Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic OperationsYoshitaka Shingaya0Amir Zulkefli1Takuya Iwasaki2Ryoma Hayakawa3Shu Nakaharai4Kenji Watanabe5Takashi Taniguchi6Yutaka Wakayama7International Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanInternational Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanInternational Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanInternational Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanInternational Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanResearch Center for Functional Materials National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanInternational Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanInternational Center for Materials Nanoarchitectonics (WPI‐MANA) National Institute for Materials Science (NIMS) 1‐1 Namiki Tsukuba 305‐0044 JapanAbstract A dual‐gate anti‐ambipolar transistor (AAT) with a two‐dimensional ReS2 and WSe2 heterojunction is developed. The characteristic Λ‐shaped transfer curves yielded by the bottom‐gate voltage are effectively controlled by the top‐gate voltage. This feature is applied to logic operations, with the bottom‐ and top‐gate voltages acting as two input signals and the drain current (Id) monitored as an output signal. Importantly, a single dual‐gate AAT exhibits all the two‐input logic operations (AND, OR, XOR, NAND, NOR, and XNOR) under optimized input voltages. Additionally, drain voltage (Vd)‐induced switching between AND and OR logic operations is achieved. These features are advantageous for simplifying circuit design.https://doi.org/10.1002/aelm.2022007042D materialsanti‐ambipolar transistorsreconfigurable logic circuitsReS 2WSe 2
spellingShingle Yoshitaka Shingaya
Amir Zulkefli
Takuya Iwasaki
Ryoma Hayakawa
Shu Nakaharai
Kenji Watanabe
Takashi Taniguchi
Yutaka Wakayama
Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations
Advanced Electronic Materials
2D materials
anti‐ambipolar transistors
reconfigurable logic circuits
ReS 2
WSe 2
title Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations
title_full Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations
title_fullStr Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations
title_full_unstemmed Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations
title_short Dual‐Gate Anti‐Ambipolar Transistor with Van der Waals ReS2/WSe2 Heterojunction for Reconfigurable Logic Operations
title_sort dual gate anti ambipolar transistor with van der waals res2 wse2 heterojunction for reconfigurable logic operations
topic 2D materials
anti‐ambipolar transistors
reconfigurable logic circuits
ReS 2
WSe 2
url https://doi.org/10.1002/aelm.202200704
work_keys_str_mv AT yoshitakashingaya dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT amirzulkefli dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT takuyaiwasaki dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT ryomahayakawa dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT shunakaharai dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT kenjiwatanabe dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT takashitaniguchi dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations
AT yutakawakayama dualgateantiambipolartransistorwithvanderwaalsres2wse2heterojunctionforreconfigurablelogicoperations