SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance
In industrial applications, software related to computational lithography using a DP system method, which refers to how efficiently hardware resources are used, has a significant impact on performance. Because the amount of data to be processed per unit of time is comparatively large in the current...
| Main Authors: | , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
MDPI AG
2021-05-01
|
| Series: | Applied Sciences |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2076-3417/11/9/4235 |
| _version_ | 1797534999162912768 |
|---|---|
| author | Young Shin Han Bo Seung Kwon Choon Sung Nam Jong Sik Lee |
| author_facet | Young Shin Han Bo Seung Kwon Choon Sung Nam Jong Sik Lee |
| author_sort | Young Shin Han |
| collection | DOAJ |
| description | In industrial applications, software related to computational lithography using a DP system method, which refers to how efficiently hardware resources are used, has a significant impact on performance. Because the amount of data to be processed per unit of time is comparatively large in the current semiconductor industry, the efficiency of hardware should be increased through job 12 scheduling by using the most efficient load balancing techniques possible. For efficient scheduling of the load balancer, these are necessary to predict the end time of a given job; this is calculated based on the performance of computing resources and the development of effective traffic distribution algorithms. Due to the high integration of semiconductor chips, the volume of mask exposure data has increased exponentially, the number of slave nodes is increasing, and most EDA tools require one license per DP node to perform a simulation. In this paper, in order to improve efficiency and reduce cost through more efficient load balancing scheduling, a new type of DEVS load balancing method was studied based on the existing industrial E-beam cluster model. The designed DEVS model showed up to four times the throughput of the existing legacy model for medium and large clusters when the BSF policy was applied. |
| first_indexed | 2024-03-10T11:38:22Z |
| format | Article |
| id | doaj.art-38bdee535ad84e4eb9f1d10c97d48687 |
| institution | Directory Open Access Journal |
| issn | 2076-3417 |
| language | English |
| last_indexed | 2024-03-10T11:38:22Z |
| publishDate | 2021-05-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Applied Sciences |
| spelling | doaj.art-38bdee535ad84e4eb9f1d10c97d486872023-11-21T18:39:37ZengMDPI AGApplied Sciences2076-34172021-05-01119423510.3390/app11094235SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load BalanceYoung Shin Han0Bo Seung Kwon1Choon Sung Nam2Jong Sik Lee3Frontier College, Inha University, 100 Inha-ro, Michuhol-gu, Incheon 22212, KoreaDepartment of Computer Engineering, Inha University, 100 Inha-ro, Michuhol-gu, Incheon 22212, KoreaDepartment of Software Convergence Engineering, Inha University, 100 Inha-ro, Michuhol-gu, Incheon 22212, KoreaDepartment of Computer Engineering, Inha University, 100 Inha-ro, Michuhol-gu, Incheon 22212, KoreaIn industrial applications, software related to computational lithography using a DP system method, which refers to how efficiently hardware resources are used, has a significant impact on performance. Because the amount of data to be processed per unit of time is comparatively large in the current semiconductor industry, the efficiency of hardware should be increased through job 12 scheduling by using the most efficient load balancing techniques possible. For efficient scheduling of the load balancer, these are necessary to predict the end time of a given job; this is calculated based on the performance of computing resources and the development of effective traffic distribution algorithms. Due to the high integration of semiconductor chips, the volume of mask exposure data has increased exponentially, the number of slave nodes is increasing, and most EDA tools require one license per DP node to perform a simulation. In this paper, in order to improve efficiency and reduce cost through more efficient load balancing scheduling, a new type of DEVS load balancing method was studied based on the existing industrial E-beam cluster model. The designed DEVS model showed up to four times the throughput of the existing legacy model for medium and large clusters when the BSF policy was applied.https://www.mdpi.com/2076-3417/11/9/4235modelsimulationload balancingdistributed processing systemscheduling |
| spellingShingle | Young Shin Han Bo Seung Kwon Choon Sung Nam Jong Sik Lee SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance Applied Sciences model simulation load balancing distributed processing system scheduling |
| title | SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance |
| title_full | SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance |
| title_fullStr | SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance |
| title_full_unstemmed | SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance |
| title_short | SLLB-DEVS: An Approach for DEVS Based Modeling of Semiconductor Lithography Load Balance |
| title_sort | sllb devs an approach for devs based modeling of semiconductor lithography load balance |
| topic | model simulation load balancing distributed processing system scheduling |
| url | https://www.mdpi.com/2076-3417/11/9/4235 |
| work_keys_str_mv | AT youngshinhan sllbdevsanapproachfordevsbasedmodelingofsemiconductorlithographyloadbalance AT boseungkwon sllbdevsanapproachfordevsbasedmodelingofsemiconductorlithographyloadbalance AT choonsungnam sllbdevsanapproachfordevsbasedmodelingofsemiconductorlithographyloadbalance AT jongsiklee sllbdevsanapproachfordevsbasedmodelingofsemiconductorlithographyloadbalance |