An FPGA Implementation of Secured Steganography Communication System
Steganography is the idea of hiding secret message in multimedia cover which will be transmitted through the Internet. The cover carriers can be image, video, sound or text data. This paper presents an implementation of color image steganographic system on Field Programmable Gate Array and the infor...
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Tikrit University
2012-12-01
|
| Series: | Tikrit Journal of Engineering Sciences |
| Subjects: | |
| Online Access: | https://tj-es.com/ojs/index.php/tjes/article/view/471 |
| _version_ | 1827903274045407232 |
|---|---|
| author | Ahlam Fadhil Mahmood Nada Abdul Kanai Sana Sami Mohmmad |
| author_facet | Ahlam Fadhil Mahmood Nada Abdul Kanai Sana Sami Mohmmad |
| author_sort | Ahlam Fadhil Mahmood |
| collection | DOAJ |
| description | Steganography is the idea of hiding secret message in multimedia cover which will be transmitted through the Internet. The cover carriers can be image, video, sound or text data. This paper presents an implementation of color image steganographic system on Field Programmable Gate Array and the information hiding/extracting techniques in various images. The proposed algorithm is based on merge between the idea from the random pixel manipulation methods and the Least Significant Bit (LSB) matching of Steganography embedding and extracting method.
In a proposed steganography hardware approach, Linear Feedback Shift Register (LFSR) method has been used in stego architecture to hide the information in the image. The LFSRs are utilized in this approach as address generators. Different LFSR arrangements using different connection unit have been implemented at the hardware level for hiding/extracting the secret data. Multilayer embedding is implemented in parallel manner with a three-stage pipeline on FPGA.
This work showed attractive results especially in the high throughputs, better stego-image quality, requires little calculation and less utilization of FPGA area. The imperceptibility of the technique combined with high payload, robustness of embedded data and accurate data retrieval renders the proposed Steganography system is suitable for covert communication and secures data transmission applications.
|
| first_indexed | 2024-03-13T00:11:27Z |
| format | Article |
| id | doaj.art-3bd7db47c5a143ff98dc725e0ecfaf11 |
| institution | Directory Open Access Journal |
| issn | 1813-162X 2312-7589 |
| language | English |
| last_indexed | 2024-03-13T00:11:27Z |
| publishDate | 2012-12-01 |
| publisher | Tikrit University |
| record_format | Article |
| series | Tikrit Journal of Engineering Sciences |
| spelling | doaj.art-3bd7db47c5a143ff98dc725e0ecfaf112023-07-12T12:54:54ZengTikrit UniversityTikrit Journal of Engineering Sciences1813-162X2312-75892012-12-0119410.25130/tjes.19.4.02An FPGA Implementation of Secured Steganography Communication SystemAhlam Fadhil Mahmood0Nada Abdul Kanai1Sana Sami Mohmmad2Computer Eng., University of Mosul, IraqComputer Eng., University of Mosul, IraqComputer Eng., University of Mosul, IraqSteganography is the idea of hiding secret message in multimedia cover which will be transmitted through the Internet. The cover carriers can be image, video, sound or text data. This paper presents an implementation of color image steganographic system on Field Programmable Gate Array and the information hiding/extracting techniques in various images. The proposed algorithm is based on merge between the idea from the random pixel manipulation methods and the Least Significant Bit (LSB) matching of Steganography embedding and extracting method. In a proposed steganography hardware approach, Linear Feedback Shift Register (LFSR) method has been used in stego architecture to hide the information in the image. The LFSRs are utilized in this approach as address generators. Different LFSR arrangements using different connection unit have been implemented at the hardware level for hiding/extracting the secret data. Multilayer embedding is implemented in parallel manner with a three-stage pipeline on FPGA. This work showed attractive results especially in the high throughputs, better stego-image quality, requires little calculation and less utilization of FPGA area. The imperceptibility of the technique combined with high payload, robustness of embedded data and accurate data retrieval renders the proposed Steganography system is suitable for covert communication and secures data transmission applications. https://tj-es.com/ojs/index.php/tjes/article/view/471SteganographySteganalysisLFSRLSB matchingFPGA |
| spellingShingle | Ahlam Fadhil Mahmood Nada Abdul Kanai Sana Sami Mohmmad An FPGA Implementation of Secured Steganography Communication System Tikrit Journal of Engineering Sciences Steganography Steganalysis LFSR LSB matching FPGA |
| title | An FPGA Implementation of Secured Steganography Communication System |
| title_full | An FPGA Implementation of Secured Steganography Communication System |
| title_fullStr | An FPGA Implementation of Secured Steganography Communication System |
| title_full_unstemmed | An FPGA Implementation of Secured Steganography Communication System |
| title_short | An FPGA Implementation of Secured Steganography Communication System |
| title_sort | fpga implementation of secured steganography communication system |
| topic | Steganography Steganalysis LFSR LSB matching FPGA |
| url | https://tj-es.com/ojs/index.php/tjes/article/view/471 |
| work_keys_str_mv | AT ahlamfadhilmahmood anfpgaimplementationofsecuredsteganographycommunicationsystem AT nadaabdulkanai anfpgaimplementationofsecuredsteganographycommunicationsystem AT sanasamimohmmad anfpgaimplementationofsecuredsteganographycommunicationsystem AT ahlamfadhilmahmood fpgaimplementationofsecuredsteganographycommunicationsystem AT nadaabdulkanai fpgaimplementationofsecuredsteganographycommunicationsystem AT sanasamimohmmad fpgaimplementationofsecuredsteganographycommunicationsystem |