Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA
A load-shedding controller suitable for small to medium size loads is designed and implemented based on preprogrammed priorities and power consumption for individual loads. The main controller decides if a particular load can be switched ON or not according to the amount of available power generatio...
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Format: | Article |
Language: | English |
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University of Baghdad
2017-04-01
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Series: | Journal of Engineering |
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Online Access: | http://joe.uobaghdad.edu.iq/index.php/main/article/view/42 |
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author | Bashar Adel Esttaifan, Ass. Lect. Mohammed Kasim Al-Haddad, Ass. Prof. Dr. |
author_facet | Bashar Adel Esttaifan, Ass. Lect. Mohammed Kasim Al-Haddad, Ass. Prof. Dr. |
author_sort | Bashar Adel Esttaifan, Ass. Lect. |
collection | DOAJ |
description | A load-shedding controller suitable for small to medium size loads is designed and implemented based on preprogrammed priorities and power consumption for individual loads. The main controller decides if a particular load can be switched ON or not according to the amount of available power generation, load consumption and loads priorities. When themaximum allowed power consumption is reached and the user want to deliver power to additional load, the controller will decide if this particular load should be denied receiving power if its priority is low. Otherwise, it can be granted to receive power if its priority is high and in this case lower priority loads are automatically switched OFF in order not to overload the power generation. The main idea of the proposed LS controller is to minimize the amount of the isolated load without overloading the power system. In this paper, three versions of load shedding controller were implemented using Altera DE2-115 FPGA; with number of loads equal 32, 64 and 128 for each controller. |
first_indexed | 2024-03-12T08:56:35Z |
format | Article |
id | doaj.art-3c7bd829a38544f7b6a6c730ca9471ee |
institution | Directory Open Access Journal |
issn | 1726-4073 2520-3339 |
language | English |
last_indexed | 2024-03-12T08:56:35Z |
publishDate | 2017-04-01 |
publisher | University of Baghdad |
record_format | Article |
series | Journal of Engineering |
spelling | doaj.art-3c7bd829a38544f7b6a6c730ca9471ee2023-09-02T15:58:06ZengUniversity of BaghdadJournal of Engineering1726-40732520-33392017-04-01235Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGABashar Adel Esttaifan, Ass. Lect.0Mohammed Kasim Al-Haddad, Ass. Prof. Dr.1College of Engineering-University of BaghdadCollege of Engineering-University of BaghdadA load-shedding controller suitable for small to medium size loads is designed and implemented based on preprogrammed priorities and power consumption for individual loads. The main controller decides if a particular load can be switched ON or not according to the amount of available power generation, load consumption and loads priorities. When themaximum allowed power consumption is reached and the user want to deliver power to additional load, the controller will decide if this particular load should be denied receiving power if its priority is low. Otherwise, it can be granted to receive power if its priority is high and in this case lower priority loads are automatically switched OFF in order not to overload the power generation. The main idea of the proposed LS controller is to minimize the amount of the isolated load without overloading the power system. In this paper, three versions of load shedding controller were implemented using Altera DE2-115 FPGA; with number of loads equal 32, 64 and 128 for each controller.http://joe.uobaghdad.edu.iq/index.php/main/article/view/42Power Systems, Load shedding, Overload, FPGA. |
spellingShingle | Bashar Adel Esttaifan, Ass. Lect. Mohammed Kasim Al-Haddad, Ass. Prof. Dr. Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA Journal of Engineering Power Systems, Load shedding, Overload, FPGA. |
title | Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA |
title_full | Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA |
title_fullStr | Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA |
title_full_unstemmed | Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA |
title_short | Implementation of a Proposed Load-Shedding System Using Altera DE2 FPGA |
title_sort | implementation of a proposed load shedding system using altera de2 fpga |
topic | Power Systems, Load shedding, Overload, FPGA. |
url | http://joe.uobaghdad.edu.iq/index.php/main/article/view/42 |
work_keys_str_mv | AT basharadelesttaifanasslect implementationofaproposedloadsheddingsystemusingalterade2fpga AT mohammedkasimalhaddadassprofdr implementationofaproposedloadsheddingsystemusingalterade2fpga |