Performance evaluation of SRAM design using different field effect transistors
SRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it. Unlike Dynamic RAM, Static RAM uses a flip-flop circuit to store each...
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| Format: | Article |
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EDP Sciences
2023-01-01
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| Series: | E3S Web of Conferences |
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| Online Access: | https://www.e3s-conferences.org/articles/e3sconf/pdf/2023/28/e3sconf_icmed-icmpc2023_01185.pdf |
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| author | C. Venkataiah Y. Mallikarjuna Rao Jayamma Manjula M.K. Linga Murthy S. Feroz Shah Ahmed Alzubaidi Laith H. |
| author_facet | C. Venkataiah Y. Mallikarjuna Rao Jayamma Manjula M.K. Linga Murthy S. Feroz Shah Ahmed Alzubaidi Laith H. |
| author_sort | C. Venkataiah |
| collection | DOAJ |
| description | SRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it. Unlike Dynamic RAM, Static RAM uses a flip-flop circuit to store each data bit, whereas Dynamic RAM uses a capacitor to store the data bit. But capacitor has tendency of losing charge which requires periodic refreshment. Thus SRAM perform better and have more stability than DRAM especially in idle state. In this work, we analysed the performance of the SRAM cell which are built with different field effect transistors and calculated the Write and Read delays, PDP (Power Delay Product) and Static Noise Margin (SNM) for all types of transistors. SRAM cell which is based on the CNT technology with optimized parameters of CNT density, CNT diameter and CNTFET flat band voltage has the better performance and stability compared with other device technologies. Optimized CNTFET SRAM cell compared with the MOSFET based SRAM the write and read delays are improved by 85.8% and 94.3% respectively. All the simulations have been carried out using HSPICE tool for 32nm technology node. |
| first_indexed | 2024-03-13T06:27:41Z |
| format | Article |
| id | doaj.art-3ce5b508af4548008ad06acc0f983656 |
| institution | Directory Open Access Journal |
| issn | 2267-1242 |
| language | English |
| last_indexed | 2024-03-13T06:27:41Z |
| publishDate | 2023-01-01 |
| publisher | EDP Sciences |
| record_format | Article |
| series | E3S Web of Conferences |
| spelling | doaj.art-3ce5b508af4548008ad06acc0f9836562023-06-09T09:11:31ZengEDP SciencesE3S Web of Conferences2267-12422023-01-013910118510.1051/e3sconf/202339101185e3sconf_icmed-icmpc2023_01185Performance evaluation of SRAM design using different field effect transistorsC. Venkataiah0Y. Mallikarjuna Rao1Jayamma Manjula2M.K. Linga Murthy3S. Feroz Shah Ahmed4Alzubaidi Laith H.5Department of Electronics & Communication Engineering, Rajeev Gandhi Memorial College of Engineering and TechnologyDepartment of Electronics & Communication Engineering, Santhiram Engineering CollegeDepartment of Computer Science Engineering, SVR Engineering CollegeSr.Assistant Professor, ECE Department, Lakireddy Bali Reddy College of Engineering (Autonomous)The Islamic University, Faculty of EngineeringThe Islamic University, Faculty of EngineeringSRAM (Static Random Access Memory) is one of the type of memory which holds the data bit without periodic refreshment. Compared with DRAM (Dynamic Random Access Memory) which requires periodic refreshment of data bit stored in it. Unlike Dynamic RAM, Static RAM uses a flip-flop circuit to store each data bit, whereas Dynamic RAM uses a capacitor to store the data bit. But capacitor has tendency of losing charge which requires periodic refreshment. Thus SRAM perform better and have more stability than DRAM especially in idle state. In this work, we analysed the performance of the SRAM cell which are built with different field effect transistors and calculated the Write and Read delays, PDP (Power Delay Product) and Static Noise Margin (SNM) for all types of transistors. SRAM cell which is based on the CNT technology with optimized parameters of CNT density, CNT diameter and CNTFET flat band voltage has the better performance and stability compared with other device technologies. Optimized CNTFET SRAM cell compared with the MOSFET based SRAM the write and read delays are improved by 85.8% and 94.3% respectively. All the simulations have been carried out using HSPICE tool for 32nm technology node.https://www.e3s-conferences.org/articles/e3sconf/pdf/2023/28/e3sconf_icmed-icmpc2023_01185.pdfsramcntfetdramfinfetgnrfet |
| spellingShingle | C. Venkataiah Y. Mallikarjuna Rao Jayamma Manjula M.K. Linga Murthy S. Feroz Shah Ahmed Alzubaidi Laith H. Performance evaluation of SRAM design using different field effect transistors E3S Web of Conferences sram cntfet dram finfet gnrfet |
| title | Performance evaluation of SRAM design using different field effect transistors |
| title_full | Performance evaluation of SRAM design using different field effect transistors |
| title_fullStr | Performance evaluation of SRAM design using different field effect transistors |
| title_full_unstemmed | Performance evaluation of SRAM design using different field effect transistors |
| title_short | Performance evaluation of SRAM design using different field effect transistors |
| title_sort | performance evaluation of sram design using different field effect transistors |
| topic | sram cntfet dram finfet gnrfet |
| url | https://www.e3s-conferences.org/articles/e3sconf/pdf/2023/28/e3sconf_icmed-icmpc2023_01185.pdf |
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