A generic method to control hysteresis and memory effect in Van der Waals hybrids
The diverse properties of two-dimensional materials have been utilized in a variety of architecture to fabricate high quality electronic circuit elements. Here we demonstrate a generic method to control hysteresis and stable memory effect in Van der Waals hybrids with a floating gate as the base lay...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
IOP Publishing
2020-01-01
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| Series: | Materials Research Express |
| Subjects: | |
| Online Access: | https://doi.org/10.1088/2053-1591/ab6923 |
| _version_ | 1797747002748960768 |
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| author | Tanweer Ahmed Saurav Islam Tathagata Paul N Hariharan Suja Elizabeth Arindam Ghosh |
| author_facet | Tanweer Ahmed Saurav Islam Tathagata Paul N Hariharan Suja Elizabeth Arindam Ghosh |
| author_sort | Tanweer Ahmed |
| collection | DOAJ |
| description | The diverse properties of two-dimensional materials have been utilized in a variety of architecture to fabricate high quality electronic circuit elements. Here we demonstrate a generic method to control hysteresis and stable memory effect in Van der Waals hybrids with a floating gate as the base layer. The floating gate can be charged with a global back gate-voltage, which it can retain in a stable manner. Such devices can provide a very high, leakage-free effective gate-voltage on the field-effect transistors due to effective capacitance amplification, which also leads to reduced input power requirements on electronic devices. The capacitance amplification factor of ∼10 can be further enhanced by increasing the area of the floating gate. We have exploited this method to achieve highly durable memory action multiple genre of ultra-thin 2D channels, including graphene, MoS _2 , and topological insulators at room temperature. |
| first_indexed | 2024-03-12T15:44:54Z |
| format | Article |
| id | doaj.art-3d2a4242af934018b8bab19efbec43d9 |
| institution | Directory Open Access Journal |
| issn | 2053-1591 |
| language | English |
| last_indexed | 2024-03-12T15:44:54Z |
| publishDate | 2020-01-01 |
| publisher | IOP Publishing |
| record_format | Article |
| series | Materials Research Express |
| spelling | doaj.art-3d2a4242af934018b8bab19efbec43d92023-08-09T15:28:17ZengIOP PublishingMaterials Research Express2053-15912020-01-017101400410.1088/2053-1591/ab6923A generic method to control hysteresis and memory effect in Van der Waals hybridsTanweer Ahmed0https://orcid.org/0000-0002-5921-8405Saurav Islam1https://orcid.org/0000-0001-8524-4992Tathagata Paul2N Hariharan3Suja Elizabeth4Arindam Ghosh5Department of Physics, Indian Institute of Science, Bangalore 560012, IndiaDepartment of Physics, Indian Institute of Science, Bangalore 560012, IndiaDepartment of Physics, Indian Institute of Science, Bangalore 560012, IndiaDepartment of Physics, Indian Institute of Science, Bangalore 560012, IndiaDepartment of Physics, Indian Institute of Science, Bangalore 560012, IndiaDepartment of Physics, Indian Institute of Science, Bangalore 560012, India; Center for Nanoscience and Engineering, Indian Institute of Science, Bangalore 560012, IndiaThe diverse properties of two-dimensional materials have been utilized in a variety of architecture to fabricate high quality electronic circuit elements. Here we demonstrate a generic method to control hysteresis and stable memory effect in Van der Waals hybrids with a floating gate as the base layer. The floating gate can be charged with a global back gate-voltage, which it can retain in a stable manner. Such devices can provide a very high, leakage-free effective gate-voltage on the field-effect transistors due to effective capacitance amplification, which also leads to reduced input power requirements on electronic devices. The capacitance amplification factor of ∼10 can be further enhanced by increasing the area of the floating gate. We have exploited this method to achieve highly durable memory action multiple genre of ultra-thin 2D channels, including graphene, MoS _2 , and topological insulators at room temperature.https://doi.org/10.1088/2053-1591/ab6923Van der Waals hybridscapacitance amplificationroom temperature memory effect |
| spellingShingle | Tanweer Ahmed Saurav Islam Tathagata Paul N Hariharan Suja Elizabeth Arindam Ghosh A generic method to control hysteresis and memory effect in Van der Waals hybrids Materials Research Express Van der Waals hybrids capacitance amplification room temperature memory effect |
| title | A generic method to control hysteresis and memory effect in Van der Waals hybrids |
| title_full | A generic method to control hysteresis and memory effect in Van der Waals hybrids |
| title_fullStr | A generic method to control hysteresis and memory effect in Van der Waals hybrids |
| title_full_unstemmed | A generic method to control hysteresis and memory effect in Van der Waals hybrids |
| title_short | A generic method to control hysteresis and memory effect in Van der Waals hybrids |
| title_sort | generic method to control hysteresis and memory effect in van der waals hybrids |
| topic | Van der Waals hybrids capacitance amplification room temperature memory effect |
| url | https://doi.org/10.1088/2053-1591/ab6923 |
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