Similarity-Aware Architecture/Compiler Co-Designed Context-Reduction Framework for Modulo-Scheduled CGRA

Similarity-Aware Architecture/Compiler Co-Designed Context-Reduction Framework for Modulo-Scheduled CGRA

Modulo-scheduled coarse-grained reconfigurable array (CGRA) processors have shown their potential for exploiting loop-level parallelism at high energy efficiency. However, these CGRAs need frequent reconfiguration during their execution, which makes them suffer from large area and power overhead for...

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Bibliographic Details
Main Authors: Zhongyuan Zhao, Weiguang Sheng, Jinchao Li, Pengfei Ye, Qin Wang, Zhigang Mao
Format: Article
Language:English
Published: MDPI AG 2021-09-01
Series:Electronics
Subjects:
CGRA
similarity-aware
context reduction
modulo scheduling
simulated annealing
Online Access:https://www.mdpi.com/2079-9292/10/18/2210

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