High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components
A high efficiency architecture for ring learning with errors (ring-LWE) cryptoprocessor using shared arithmetic components is presented in this paper. By applying a novel approach for sharing number theoretic transform (NTT) polynomial multiplier and polynomial adder in encryption and decryption ope...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2020-06-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/9/7/1075 |
| _version_ | 1797563709441179648 |
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| author | Tuy Nguyen Tan Tram Thi Bao Nguyen Hanho Lee |
| author_facet | Tuy Nguyen Tan Tram Thi Bao Nguyen Hanho Lee |
| author_sort | Tuy Nguyen Tan |
| collection | DOAJ |
| description | A high efficiency architecture for ring learning with errors (ring-LWE) cryptoprocessor using shared arithmetic components is presented in this paper. By applying a novel approach for sharing number theoretic transform (NTT) polynomial multiplier and polynomial adder in encryption and decryption operations, the total number of polynomial multipliers and polynomial adders used in the proposed ring-LWE cryptoprocessor are reduced. In addition, the processing time of NTT polynomial multiplier is speeded up by employing multiple-path delay feedback (MDF) architecture and deploying pipelined technique between all stages of NTT processes. As a result, the proposed architecture offers a great reduction in terms of the hardware complexity and computation latency compared with existing works. The implementation result for the proposed ring-LWE cryptoprocessor on Virtex-7 FPGA board using Xilinx VIVADO shows a significant decrease in the number of slices and LUTs compared with previous works. Moreover, the proposed ring-LWE cryptoprocessor offers higher throughput and efficiency than its predecessors. |
| first_indexed | 2024-03-10T18:46:17Z |
| format | Article |
| id | doaj.art-405cc7b19eff4c069a4870cd46f08b0e |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T18:46:17Z |
| publishDate | 2020-06-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-405cc7b19eff4c069a4870cd46f08b0e2023-11-20T05:27:29ZengMDPI AGElectronics2079-92922020-06-0197107510.3390/electronics9071075High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic ComponentsTuy Nguyen Tan0Tram Thi Bao Nguyen1Hanho Lee2Faculty of Information Technology, Ton Duc Thang University, Ho Chi Minh City 758307, VietnamDepartment of Information and Communication Engineering, Inha University, Incheon 22212, KoreaDepartment of Information and Communication Engineering, Inha University, Incheon 22212, KoreaA high efficiency architecture for ring learning with errors (ring-LWE) cryptoprocessor using shared arithmetic components is presented in this paper. By applying a novel approach for sharing number theoretic transform (NTT) polynomial multiplier and polynomial adder in encryption and decryption operations, the total number of polynomial multipliers and polynomial adders used in the proposed ring-LWE cryptoprocessor are reduced. In addition, the processing time of NTT polynomial multiplier is speeded up by employing multiple-path delay feedback (MDF) architecture and deploying pipelined technique between all stages of NTT processes. As a result, the proposed architecture offers a great reduction in terms of the hardware complexity and computation latency compared with existing works. The implementation result for the proposed ring-LWE cryptoprocessor on Virtex-7 FPGA board using Xilinx VIVADO shows a significant decrease in the number of slices and LUTs compared with previous works. Moreover, the proposed ring-LWE cryptoprocessor offers higher throughput and efficiency than its predecessors.https://www.mdpi.com/2079-9292/9/7/1075cryptoprocessorpipelinedmultiple-path delay feedbackring-LWEshared arithmetic components |
| spellingShingle | Tuy Nguyen Tan Tram Thi Bao Nguyen Hanho Lee High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components Electronics cryptoprocessor pipelined multiple-path delay feedback ring-LWE shared arithmetic components |
| title | High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components |
| title_full | High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components |
| title_fullStr | High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components |
| title_full_unstemmed | High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components |
| title_short | High Efficiency Ring-LWE Cryptoprocessor Using Shared Arithmetic Components |
| title_sort | high efficiency ring lwe cryptoprocessor using shared arithmetic components |
| topic | cryptoprocessor pipelined multiple-path delay feedback ring-LWE shared arithmetic components |
| url | https://www.mdpi.com/2079-9292/9/7/1075 |
| work_keys_str_mv | AT tuynguyentan highefficiencyringlwecryptoprocessorusingsharedarithmeticcomponents AT tramthibaonguyen highefficiencyringlwecryptoprocessorusingsharedarithmeticcomponents AT hanholee highefficiencyringlwecryptoprocessorusingsharedarithmeticcomponents |