FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS
Microwave Imaging (MI) for biomedical applications has attracted attention due to its harmless radiation compared to X-ray or MRI. One of the commonly used computing methods in MI is Finite Difference Time Domain (FDTD), which is executed several times in iterative loops, hence resulting in a high e...
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| Format: | Article |
| Language: | English |
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IEEE
2021-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/9526600/ |
| _version_ | 1831629534706794496 |
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| author | Mohammad Amir Mansoori Pan Lu Mario R. Casu |
| author_facet | Mohammad Amir Mansoori Pan Lu Mario R. Casu |
| author_sort | Mohammad Amir Mansoori |
| collection | DOAJ |
| description | Microwave Imaging (MI) for biomedical applications has attracted attention due to its harmless radiation compared to X-ray or MRI. One of the commonly used computing methods in MI is Finite Difference Time Domain (FDTD), which is executed several times in iterative loops, hence resulting in a high execution time. Although several hardware accelerators for FDTD have been recently introduced, they are not specifically designed for MI applications. In particular, only simple absorbing boundary conditions have been investigated, and the impact of dispersive materials on FDTD has not been considered. In this paper, we propose a multi-FPGA accelerator for 3D FDTD that is integrated in an MI algorithm, with Convolutional Perfectly Matched Layer (CPML) boundary conditions and an exact model for dispersive materials. By using High Level Synthesis (HLS), we obtain an optimized hardware accelerator that uses an efficient blocking method to reduce the data transfer time between external and local memories. We propose two alternative architectures that trade off performance and resource usage. In addition, our code, being developed at a high level, can also be run on GPUs whenever necessary. The results show that our multi-FPGA accelerator is superior to three similar GPU-based designs in terms of execution time and power consumption. |
| first_indexed | 2024-12-19T02:01:04Z |
| format | Article |
| id | doaj.art-427ecd77fff344b2b840ebd21a2344ef |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-12-19T02:01:04Z |
| publishDate | 2021-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-427ecd77fff344b2b840ebd21a2344ef2022-12-21T20:41:03ZengIEEEIEEE Access2169-35362021-01-01912269612271110.1109/ACCESS.2021.31094919526600FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLSMohammad Amir Mansoori0https://orcid.org/0000-0002-8030-2644Pan Lu1https://orcid.org/0000-0002-9128-4728Mario R. Casu2https://orcid.org/0000-0002-1026-0178Department of Electronics and Telecommunications, Politecnico di Torino, Torino, ItalyDepartment of Engineering, King’s College London, London, U.K.Department of Electronics and Telecommunications, Politecnico di Torino, Torino, ItalyMicrowave Imaging (MI) for biomedical applications has attracted attention due to its harmless radiation compared to X-ray or MRI. One of the commonly used computing methods in MI is Finite Difference Time Domain (FDTD), which is executed several times in iterative loops, hence resulting in a high execution time. Although several hardware accelerators for FDTD have been recently introduced, they are not specifically designed for MI applications. In particular, only simple absorbing boundary conditions have been investigated, and the impact of dispersive materials on FDTD has not been considered. In this paper, we propose a multi-FPGA accelerator for 3D FDTD that is integrated in an MI algorithm, with Convolutional Perfectly Matched Layer (CPML) boundary conditions and an exact model for dispersive materials. By using High Level Synthesis (HLS), we obtain an optimized hardware accelerator that uses an efficient blocking method to reduce the data transfer time between external and local memories. We propose two alternative architectures that trade off performance and resource usage. In addition, our code, being developed at a high level, can also be run on GPUs whenever necessary. The results show that our multi-FPGA accelerator is superior to three similar GPU-based designs in terms of execution time and power consumption.https://ieeexplore.ieee.org/document/9526600/FPGAHLSFDTDhardware accelerationmicrowave imaging |
| spellingShingle | Mohammad Amir Mansoori Pan Lu Mario R. Casu FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS IEEE Access FPGA HLS FDTD hardware acceleration microwave imaging |
| title | FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS |
| title_full | FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS |
| title_fullStr | FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS |
| title_full_unstemmed | FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS |
| title_short | FPGA Acceleration of 3D FDTD for Multi- Antennas Microwave Imaging Using HLS |
| title_sort | fpga acceleration of 3d fdtd for multi antennas microwave imaging using hls |
| topic | FPGA HLS FDTD hardware acceleration microwave imaging |
| url | https://ieeexplore.ieee.org/document/9526600/ |
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