The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications
This paper presents a single-bit CMOS image sensor (CIS) that uses a data processing technique with an edge detection block for simple iris segmentation. In order to recognize the iris image, the image sensor conventionally captures high-resolution image data in digital code, extracts the iris data,...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
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MDPI AG
2018-02-01
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| Series: | Sensors |
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| Online Access: | http://www.mdpi.com/1424-8220/18/2/669 |
| _version_ | 1828349078774218752 |
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| author | Keunyeol Park Minkyu Song Soo Youn Kim |
| author_facet | Keunyeol Park Minkyu Song Soo Youn Kim |
| author_sort | Keunyeol Park |
| collection | DOAJ |
| description | This paper presents a single-bit CMOS image sensor (CIS) that uses a data processing technique with an edge detection block for simple iris segmentation. In order to recognize the iris image, the image sensor conventionally captures high-resolution image data in digital code, extracts the iris data, and then compares it with a reference image through a recognition algorithm. However, in this case, the frame rate decreases by the time required for digital signal conversion of multi-bit digital data through the analog-to-digital converter (ADC) in the CIS. In order to reduce the overall processing time as well as the power consumption, we propose a data processing technique with an exclusive OR (XOR) logic gate to obtain single-bit and edge detection image data instead of multi-bit image data through the ADC. In addition, we propose a logarithmic counter to efficiently measure single-bit image data that can be applied to the iris recognition algorithm. The effective area of the proposed single-bit image sensor (174 × 144 pixel) is 2.84 mm2 with a 0.18 μm 1-poly 4-metal CMOS image sensor process. The power consumption of the proposed single-bit CIS is 2.8 mW with a 3.3 V of supply voltage and 520 frame/s of the maximum frame rates. The error rate of the ADC is 0.24 least significant bit (LSB) on an 8-bit ADC basis at a 50 MHz sampling frequency. |
| first_indexed | 2024-04-14T01:05:17Z |
| format | Article |
| id | doaj.art-43ef7cfc164c47a3837933fa2caf2c0a |
| institution | Directory Open Access Journal |
| issn | 1424-8220 |
| language | English |
| last_indexed | 2024-04-14T01:05:17Z |
| publishDate | 2018-02-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Sensors |
| spelling | doaj.art-43ef7cfc164c47a3837933fa2caf2c0a2022-12-22T02:21:17ZengMDPI AGSensors1424-82202018-02-0118266910.3390/s18020669s18020669The Design of a Single-Bit CMOS Image Sensor for Iris Recognition ApplicationsKeunyeol Park0Minkyu Song1Soo Youn Kim2Department of Semiconductor Science, Dongguk University-Seoul, Seoul 04620, KoreaDepartment of Semiconductor Science, Dongguk University-Seoul, Seoul 04620, KoreaDepartment of Semiconductor Science, Dongguk University-Seoul, Seoul 04620, KoreaThis paper presents a single-bit CMOS image sensor (CIS) that uses a data processing technique with an edge detection block for simple iris segmentation. In order to recognize the iris image, the image sensor conventionally captures high-resolution image data in digital code, extracts the iris data, and then compares it with a reference image through a recognition algorithm. However, in this case, the frame rate decreases by the time required for digital signal conversion of multi-bit digital data through the analog-to-digital converter (ADC) in the CIS. In order to reduce the overall processing time as well as the power consumption, we propose a data processing technique with an exclusive OR (XOR) logic gate to obtain single-bit and edge detection image data instead of multi-bit image data through the ADC. In addition, we propose a logarithmic counter to efficiently measure single-bit image data that can be applied to the iris recognition algorithm. The effective area of the proposed single-bit image sensor (174 × 144 pixel) is 2.84 mm2 with a 0.18 μm 1-poly 4-metal CMOS image sensor process. The power consumption of the proposed single-bit CIS is 2.8 mW with a 3.3 V of supply voltage and 520 frame/s of the maximum frame rates. The error rate of the ADC is 0.24 least significant bit (LSB) on an 8-bit ADC basis at a 50 MHz sampling frequency.http://www.mdpi.com/1424-8220/18/2/669Analog-to-digital converterCMOS image sensoredge detectioniris recognitionXOR |
| spellingShingle | Keunyeol Park Minkyu Song Soo Youn Kim The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications Sensors Analog-to-digital converter CMOS image sensor edge detection iris recognition XOR |
| title | The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications |
| title_full | The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications |
| title_fullStr | The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications |
| title_full_unstemmed | The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications |
| title_short | The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications |
| title_sort | design of a single bit cmos image sensor for iris recognition applications |
| topic | Analog-to-digital converter CMOS image sensor edge detection iris recognition XOR |
| url | http://www.mdpi.com/1424-8220/18/2/669 |
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