Design of the Low Noise Amplifier Circuit in Band L for Improve the Gain and Circuit Stability

Design of the Low Noise Amplifier Circuit in Band L for Improve the Gain and Circuit Stability

In this paper, focuses on the design of Low Noise Amplifier circuitry in the frequency band L. This circuit is designed using the 0.18 nm CMOS transistor technology, which consists of two transistor Stage. The purpose of this research is to improve the cost of: Increase Gain - Increase circuit linea...

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Bibliographic Details
Main Authors: Arash Omidi, Rohalah Karami, Parisa Sadat Emadi, Hamed Moradi
Format: Article
Language:English
Published: Ital Publication 2017-12-01
Series:Emerging Science Journal
Subjects:
Gain
Noise Figure
LNA
Linearization
L Band.
Online Access:https://ijournalse.org/index.php/ESJ/article/view/51
Description
Summary:In this paper, focuses on the design of Low Noise Amplifier circuitry in the frequency band L. This circuit is designed using the 0.18 nm CMOS transistor technology, which consists of two transistor Stage. The purpose of this research is to improve the cost of: Increase Gain - Increase circuit linearization - Create an integrative matching network for system stability. The application of this circuit can be used in wireless and GPS systems. The CMOS LNA exhibits a gain greater than 23 dB from 1.1 to 2.0 GHz, and a noise figure of 2.7 to 3.3 dB from 1.2 to 2.4 GHz. At 1.575 GHz, the 1-dB compression point (P1dB) is 1.73 dBm, with an input third-order intercept point (IIP3) of -3.98 dBm. This circuit is designed using ADS software.
ISSN:2610-9182

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