Multi-Tier 3D IC Physical Design with Analytical Quadratic Partitioning Algorithm Using 2D P&R Tool

In this study, we developed a complete flow for the design of monolithic 3D ICs. We have taken the register-transfer level netlist of a circuit as the input and synthesized it to construct the gate-level netlist. Next, we partitioned the circuit using custom-made partitioning algorithms and implemen...

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Bibliographic Details
Main Authors: Azwad Tamir, Milad Salem, Jie Lin, Qutaiba Alasad, Jiann-shiun Yuan
Format: Article
Language:English
Published: MDPI AG 2021-08-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/10/16/1930