CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability

NAND flash suffers from program interference and retention errors, which negatively affect its reliability. Existing schemes preprocess raw data before writing them to reduce Raw Bit Error Rate (RBER) and leverage ECCs (such as LDPC codes) to reduce Uncorrectable Bit Error Rate (UBER). Prior arts fa...

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Main Authors: Hongwei Qin, Yutong Zhao, Dan Feng, Jingning Liu, Wei Tong
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9055021/
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author Hongwei Qin
Yutong Zhao
Dan Feng
Jingning Liu
Wei Tong
author_facet Hongwei Qin
Yutong Zhao
Dan Feng
Jingning Liu
Wei Tong
author_sort Hongwei Qin
collection DOAJ
description NAND flash suffers from program interference and retention errors, which negatively affect its reliability. Existing schemes preprocess raw data before writing them to reduce Raw Bit Error Rate (RBER) and leverage ECCs (such as LDPC codes) to reduce Uncorrectable Bit Error Rate (UBER). Prior arts failed to take into account the counteractions between the program interference and retention errors.Thus, they may lead to sub-optimal error avoidance. Besides, after the preprocessing procedure, data randomness may be affected. Since NAND flash shows numerical-correlated error characteristics, there's a potential to provide such information to LDPC codes to further improve performance. In this article, we propose a holistic strategy consisting of two coupled procedures to enhance flash reliability. First, we use our previously proposed CeSR strategy to reduce RBER. Second, we improve the existing LDPC codes and name it Assisted LDPC strategy to reduce UBER. The Assisted LDPC is deeply coupled with CeSR. It leverages the data pattern after CeSR to improve the decoding success rate and accelerate the decoding procedure. The evaluation shows that compared with the state-of-the-art NRC strategy, CeSR can reduce the RBER of hot and cold data by up to 20.30% and 85.13%, respectively. Besides, compared with the traditional LDPC, the Assisted LDPC decoding strategy can increase the decoding success rate by up to 97% for cold data and reduce the average decoding iteration number of MSB pages for hot and cold data by up to 31.6% and 73.9%, respectively.
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spelling doaj.art-4867c279adc049c7870c45ae163618602022-12-21T20:29:03ZengIEEEIEEE Access2169-35362020-01-018632396325410.1109/ACCESS.2020.29852919055021CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash ReliabilityHongwei Qin0https://orcid.org/0000-0002-5453-8661Yutong Zhao1https://orcid.org/0000-0002-4786-7440Dan Feng2Jingning Liu3Wei Tong4Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, ChinaWuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, ChinaWuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, ChinaWuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, ChinaWuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, ChinaNAND flash suffers from program interference and retention errors, which negatively affect its reliability. Existing schemes preprocess raw data before writing them to reduce Raw Bit Error Rate (RBER) and leverage ECCs (such as LDPC codes) to reduce Uncorrectable Bit Error Rate (UBER). Prior arts failed to take into account the counteractions between the program interference and retention errors.Thus, they may lead to sub-optimal error avoidance. Besides, after the preprocessing procedure, data randomness may be affected. Since NAND flash shows numerical-correlated error characteristics, there's a potential to provide such information to LDPC codes to further improve performance. In this article, we propose a holistic strategy consisting of two coupled procedures to enhance flash reliability. First, we use our previously proposed CeSR strategy to reduce RBER. Second, we improve the existing LDPC codes and name it Assisted LDPC strategy to reduce UBER. The Assisted LDPC is deeply coupled with CeSR. It leverages the data pattern after CeSR to improve the decoding success rate and accelerate the decoding procedure. The evaluation shows that compared with the state-of-the-art NRC strategy, CeSR can reduce the RBER of hot and cold data by up to 20.30% and 85.13%, respectively. Besides, compared with the traditional LDPC, the Assisted LDPC decoding strategy can increase the decoding success rate by up to 97% for cold data and reduce the average decoding iteration number of MSB pages for hot and cold data by up to 31.6% and 73.9%, respectively.https://ieeexplore.ieee.org/document/9055021/Cell state remappingflash reliabilityLDPC codesNAND flash memoryprogram interferenceretention error
spellingShingle Hongwei Qin
Yutong Zhao
Dan Feng
Jingning Liu
Wei Tong
CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability
IEEE Access
Cell state remapping
flash reliability
LDPC codes
NAND flash memory
program interference
retention error
title CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability
title_full CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability
title_fullStr CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability
title_full_unstemmed CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability
title_short CeSR + Assisted LDPC: A Holistic Strategy to Improve MLC NAND Flash Reliability
title_sort cesr x002b assisted ldpc a holistic strategy to improve mlc nand flash reliability
topic Cell state remapping
flash reliability
LDPC codes
NAND flash memory
program interference
retention error
url https://ieeexplore.ieee.org/document/9055021/
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AT jingningliu cesrx002bassistedldpcaholisticstrategytoimprovemlcnandflashreliability
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